IP Library Granted Patent US 7,907,328
Granted Patent B2
US 7,907,328 · App. 12/495,928 · Granted Mar 15, 2011

Circuit board, electro-optic device, and electronic apparatus

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Quick Facts
Patent No.
US 7,907,328
App. No.
12/495,928
Granted
Mar 15, 2011
Kind
B2
Abstract

A circuit board includes a substrate; a plurality of scan lines disposed on the substrate, the scan lines extending in a first direction; a plurality of signal lines disposed on the substrate, the signal lines extending in a second direction intersecting the first direction; a plurality of transistors, each of which is electrically connected to corresponding one of the plurality of scan lines and corresponding one of the plurality of signal lines; an insulating layer that covers the plurality of scan lines, the plurality of signal lines, and the plurality of transistors; and a plurality of electrodes, each of which is electrically connected to corresponding one of the plurality of transistors. One opening is formed in the insulating layer for every electrode group, the electrode group being constituted by at least two adjacent electrodes among the plurality of electrodes, and each of the plurality of electrodes is electrically connected to the corresponding one of the transistors through the opening.

Claims (25)

1. A circuit board comprising:

a substrate;

a plurality of scan lines disposed on the substrate, the scan lines extending in a first direction;

a plurality of signal lines disposed on the substrate, the signal lines extending in a second direction intersecting the first direction;

a plurality of transistors, each of which is electrically connected to a corresponding one of the plurality of scan lines and corresponding one of the plurality of signal lines;

an insulating layer that covers the plurality of scan lines, the plurality of signal lines, and the plurality of transistors; and

a plurality of pixel electrodes, each of which is electrically connected to a corresponding one of the plurality of transistors,

wherein:

one opening is formed in the insulating layer for every electrode group, the electrode group being constituted by at least two adjacent pixel electrodes among the plurality of pixel electrodes, and

each of the at least two pixel electrodes is electrically connected to the corresponding one of the transistors through the opening.

2. The circuit board according to claim 1 , wherein the electrode group is constituted by two pixel electrodes arranged in the first direction, and

the plurality of signal lines are arranged so that two signal lines are assigned for every electrode group and sandwich the opening.

3. The circuit board according to claim 2 , wherein, the plurality of transistors are arranged so that two transistors are assigned for every electrode group and are arranged symmetrically to sandwich the opening.

4. The circuit board according to claim 1 , wherein the electrode group is constituted by two pixel electrodes arranged in the second direction, and

the plurality of scan lines are arranged so that two scan lines are assigned for every electrode group and sandwich the opening.

5. The circuit board according to claim 1 , wherein the plurality of transistors are organic transistors.

6. The circuit board according to claim 1 , wherein the electrode group is constituted by four pixel electrodes arranged in two rows in the first direction and two columns in the second direction,

the plurality of scan lines are arranged so that two scan lines are assigned for every electrode group and sandwich the opening, and

the plurality of signal lines are arranged so that two signal lines are assigned for every electrode group and sandwich the opening.

7. An electro-optic device comprising:

the circuit board according to claim 1 , and

an electro-optic layer disposed on the circuit board.

8. The electro-optic device according to claim 7 , wherein the electro-optic layer is an electrophoretic layer.

9. An electronic apparatus comprising:

the electro-optic device according to claim 7 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2018
From: SEIKO EPSON CORPORATION
To: E INK CORPORATION
Reel/Frame 047072/0325 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2009
From: AOKI, TAKASHI
To: SEIKO EPSON CORPORATION
Reel/Frame 022900/0256 →