IP Library Granted Patent US 8,867,674
Granted Patent B2
US 8,867,674 · App. 12/500,361 · Granted Oct 21, 2014

Scalable satellite receiver system

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Quick Facts
Patent No.
US 8,867,674
App. No.
12/500,361
Granted
Oct 21, 2014
Kind
B2
Abstract

A receiver for a multi-channel communication system can include a down-converter device, an analog-to-digital converter (ADC), and a plurality of digital channel selection devices. The down-converter device can be configured to down-convert a plurality of analog signals from the multi-channel communication system to a plurality of corresponding low intermediate frequency (IF) signals. The ADC can be configured to convert the plurality of corresponding low-IF signals to a plurality of digital signals. Further, each digital channel selection device from the plurality of digital channel selection devices can be configured to select a digital signal corresponding to a channel of interest from the plurality of digital signals for further processing.

Claims (54)

1. A receiver for a multi-channel communication system, comprising:

a down-converter device configured to down-convert a plurality of analog signals from the multi-channel communication system to a plurality of baseband signals;

an analog-to-digital converter (ADC) configured to convert the plurality of baseband signals to a plurality of digital signals; and

a digital channel selection device coupled to the ADC, wherein the digital channel selection device comprises:

a down mixer configured to tune the plurality of digital signals to a first intermediate frequency (IF) to generate a down-mixed representation of the plurality of digital signals;

an up-mixer configured to tune the plurality of digital signals to a second IF to generate an up-mixed representation of the plurality of digital signals; and

a control device configured to select one of the plurality of digital signals, the up-mixed representation of the plurality of digital signals, or the down-mixed representation of the plurality of digital signals based on which representation of the plurality of digital signals is closest to a direct current (DC) frequency for further processing to tune to a channel of interest.

2. The receiver of claim 1 , further comprising:

an antenna configured to receive the plurality of analog signals; and

a low-noise block (LNB) converter configured to down-convert the plurality of analog signals received by the antenna to an L-band range of frequencies, wherein the plurality of analog signals residing in the L-band range of frequencies are subsequently processed by the down-converter device.

3. The receiver of claim 2 , wherein the antenna receives the plurality of analog signals from at least one of a C-band, a Ku-band, a Ka-band of frequencies, or a combination thereof.

4. The receiver of claim 1 , wherein the down-converter comprises:

a mixer with a local oscillator (LO) input that corresponds to a frequency substantially in the center of a predefined frequency band;

a filter configured to filter an output of the mixer; and

an amplifier configured to amplify the filtered output of the mixer.

5. The receiver of claim 4 , wherein the mixer comprises an in-phase/quadrature-phase (I-Q) mixer configured to generate a complex-valued analog baseband signal at the output of the mixer, wherein the complex-valued analog baseband signal includes a complex I-Q signal with an in-phase signal (I-signal) component and a quadrature-phase signal (Q-signal) component.

6. The receiver of claim 5 , wherein the ADC is configured to convert the I-signal and Q-signal components of the complex I-Q signal to a digital signal.

7. The receiver of claim 1 , wherein the digital channel selection device comprises a mixer, a direct digital frequency synthesis (DDFS) device, and a decimation filter bank.

8. The receiver of claim 7 , wherein the DDFS device comprises an input to the mixer, the input having a frequency that tunes the mixer to the channel of interest.

9. The receiver of claim 7 , wherein the decimation filter bank is configured to filter an output of the mixer based on a predefined frequency response and to down-sample the filtered output of the mixer.

10. The receiver of claim 1 , wherein the ADC is configured to output a plurality of interleaved digital signals corresponding to the baseband signals.

11. The receiver of claim 1 , wherein the digital channel selection device comprises

a fine mixer configured to tune the selected plurality of digital signals to substantially zero frequency.

12. A method to process a plurality of analog signals from a multi-channel communication system, the method comprising:

down-converting the plurality of analog signals to a plurality of baseband signals;

converting the plurality of baseband signals to a plurality of digital signals; and

tuning the plurality of digital signals to a first intermediate frequency (IF) to generate a down-mixed representation of the plurality of digital signals;

tuning the plurality of digital signals to a second IF to generate an up-mixed representation of the plurality of digital signals; and

selecting a digital signal corresponding to a channel of interest, wherein the selecting comprises selecting one of the plurality of digital signals, the up-mixed representation of the plurality of digital signals, or the down-mixed representation of the plurality of digital signals based on which representation of the plurality of digital signals is closest to a direct current (DC) frequency.

13. The method of claim 12 , further comprising:

receiving the plurality of analog signals with an antenna; and

down-converting the plurality of analog signals received by the antenna to an L-band range of frequencies prior to down-converting the plurality of analog signals to the plurality of baseband signals.

14. The method of claim 12 , wherein down-converting comprises:

mixing the plurality of analog signals with a local oscillator (LO) input that corresponds to a frequency substantially in the center of a predefined frequency band;

filtering an output of the mixer; and

amplifying the filtered output of the mixer.

15. The method of claim 14 , wherein mixing comprises generating a complex-valued analog baseband signal at the output of the mixer, wherein the complex-valued analog baseband signal includes a complex in-phase/quadrature-phase (I-Q) signal with an in-phase signal (I-signal) component and a quadrature-phase signal (Q-signal) component.

16. A system to process a plurality of analog signals from a multi-channel communication system, the system comprising:

an antenna;

a receiver coupled to the antenna, wherein the receiver receives the plurality of analog signals through the antenna;

a processor coupled to the receiver, wherein the processor controls one or more operations of the receiver; and

a memory in communication with the processor, the memory for storing a plurality of processing instructions for directing the processor to:

down-convert the plurality of analog signals to a plurality of baseband signals;

convert the plurality of baseband signals to a plurality of digital signals; and

tune the plurality of digital signals to a first intermediate frequency (IF) to generate a down-mixed representation of the plurality of digital signals;

tune the plurality of signals to a second IF to generate an up-mixed representation of the plurality of digital signals; and

select a digital signal corresponding to a channel of interest, wherein the channel of interest is selected from one of the plurality of digital signals, the up-mixed representation of the plurality of digital signals, or the down-mixed representation of the plurality of digital signals based on which representation of the plurality of digital signals is closest to a direct current (DC) frequency.

17. The system of claim 16 , further comprising a memory in communication with the processor, the memory for storing a plurality of processing instructions for directing the processor to down-convert the plurality of analog signals received by the antenna to an L-band range of frequencies prior to directing the processor to down-convert the plurality of analog signals to the plurality of baseband signals.

18. The system of claim 16 , wherein the instructions for directing the processor to down-convert the plurality of analog signals to the plurality of baseband signals comprise instructions for directing the processor to:

mix the plurality of analog signals with a local oscillator (LO) input that corresponds to a frequency substantially in the center of a predefined frequency band;

filter an output of the mixer; and

amplify the filtered output of the mixer.

19. The system of claim 18 , wherein the instructions for directing the processor to mix the plurality of analog signals comprise instructions for directing the processor to generate a complex-valued analog baseband signal at the output of the mixer, wherein the complex-valued analog baseband signal includes a complex in-phase/quadrature-phase (I-Q) signal with an in-phase signal (I-signal) component and a quadrature-phase signal (Q-signal) component.

20. The system of claim 19 , wherein the instructions for directing the processor to convert the plurality of baseband signals to the plurality of digital signals comprise instructions for directing the processor to convert the I-signal and Q-signal components of the complex I-Q signal to a digital signal.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2009
From: YU, TOMMY
To: BROADCOM CORPORATION
Reel/Frame 022936/0213 →