IP Library Granted Patent US 8,097,881
Granted Patent B2
US 8,097,881 · App. 12/502,653 · Granted Jan 17, 2012

Thin film transistor substrate and a fabricating method thereof

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Quick Facts
Patent No.
US 8,097,881
App. No.
12/502,653
Granted
Jan 17, 2012
Kind
B2
Abstract

An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.

Claims (33)

1. A thin film transistor substrate comprising:

a gate line and a gate electrode disposed on an insulating substrate;

an oxide semiconductor pattern disposed adjacent to the gate electrode;

a data line electrically insulated from the gate line;

a first opening exposing the data line corresponding to a drain electrode pad;

a second opening exposing the oxide semiconductor pattern; and

a drain electrode disposed in the first opening and contacting the drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad exposed in the first opening and the oxide semiconductor pattern exposed in the second opening.

2. The thin film transistor of claim 1 , wherein a second insulating layer and a third insulating layer are disposed on the oxide semiconductor pattern.

3. The thin film transistor of claim 2 , wherein a third opening exposes the oxide semiconductor pattern.

4. The thin film transistor of claim 3 , wherein the second opening and the third opening expose the oxide semiconductor pattern through the second insulating layer and the third insulating layer.

5. The thin film transistor of claim 4 , wherein the first opening exposes the oxide semiconductor pattern through the third insulating layer.

6. The thin film transistor of claim 5 , wherein a source-pixel electrode is electrically connected to the oxide semiconductor pattern through the third opening.

7. The thin film transistor of claim 6 , wherein the source-pixel electrode is in direct contact with the oxide semiconductor pattern.

8. The thin film transistor of claim 7 , wherein the oxide semiconductor pattern comprises at least one of Ga, In, Zn, Sn, Ta, Ti, Cr, Hf, Y, Fe, Ru, Cd, Li Be, Na, Mg, V, Zr, Nb, Sc, W, Mn, Fe, Ni, Pd, Cu, B, Al, Ge, Si, C, N, P, F, and O, and a combination comprising at least one of the foregoing elements.

9. The thin film transistor of claim 1 , wherein the drain electrode comprises at least one of Ga, In, Zn, Sn, Ta, Ti, Cr, Hf, Y, Fe, Ru, Cd, Li Be, Na, Mg, V, Zr, Nb, Sc, W, Mn, Fe, Ni, Pd, Cu, B, Al, Ge, Si, C, N, P, F, and O, and a combination comprising at least one of the foregoing elements.

10. The thin film transistor of claim 1 , wherein the data line is disposed apart from the oxide semiconductor pattern.

11. The thin film transistor of claim 10 , wherein the source-pixel electrode comprises a first material, the drain electrode comprises a second material, and the first material is the same as the second material.

12. The thin film transistor of claim 11 , wherein the source-pixel electrode defines a pixel area.

13. The thin film transistor of claim 2 , wherein an edge of the second insulating layer comprises a shape which corresponds to a shape of an edge of the oxide semiconductor pattern.

14. The thin film transistor of claim 13 , wherein the drain electrode pad comprises a third material, the data line comprises a fourth material, and the third material is the same as the fourth material.

15. The thin film transistor of claim 14 , wherein the drain electrode is in direct contact with the drain electrode pad.

16. The thin film transistor of claim 15 , wherein the third opening exposes the oxide semiconductor pattern.

17. The thin film transistor of claim 16 , wherein a source-pixel electrode is in direct contact with the oxide semiconductor pattern through the third opening.

18. The thin film transistor of claim 17 , wherein the drain electrode pad comprises a third material, the source-pixel electrode comprises a first material, and the third material is the same as the first material.

19. A thin film transistor substrate comprising:

a gate line and a gate electrode disposed on an insulating substrate;

an oxide semiconductor pattern disposed adjacent to the gate electrode;

a data line, which is insulated from the gate line, disposed on the insulating substrate;

a first opening exposing the data line;

an etch stopper layer has a shape substantially the same as the oxide semiconductor pattern;

a second opening exposing the oxide semiconductor pattern; and

a drain electrode disposed in the first opening and the second opening,

wherein the drain electrode electrically connects the data line and the oxide semiconductor pattern through the first opening and the second opening, respectively.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029151/0055 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2009
From: LEE, YOUNG-WOOK; YOO, HONG-SUK; SONG, JEAN-HO; YOUN, JAE-HYOUNG; KIM, JONG-IN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 022954/0027 →