Parallel packet processor with session active checker

1. An apparatus for processing received packets, comprising:

a plurality of packet processors

a session active checker to distribute received packets among the plurality of packet processors

a plurality of first-in first-out (FIFO) queues to store packets sent from the session active checker to a corresponding one of the plurality of packet processors, each FIFO queue having a predetermined number of slots to store packets

wherein the session active checker comprises:

a session active memory adapted to store a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues

logic that extracts a session identifier from a received packet to identify a session associated with the received packet

a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory to determine if any other packet belonging to the identified session is currently stored in any of the plurality of FIFO queues

logic that sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently stored in the plurality of FIFO queues, wherein

in the case that the session active checker determines that another packet belonging to the identified session is currently stored in the plurality of FIFO queues, the session active checker waits until the processing of the other packet is complete before sending the received packet to the selected packet processor.

2. The apparatus of claim 1 , wherein the session active memory stores a valid bit associated with each of the plurality of session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of FIFO queues.

3. The apparatus of claim 2 , wherein

each of the plurality of FIFO queues includes an associated read pointer and an associated write pointer

the valid bits stored in the session active memory are set and reset in accordance with the values of the read pointers and write pointers associated with the plurality of FIFO queues.

4. The apparatus of claim 1 , further comprising:

an input buffer adapted to store a plurality of received packets

wherein, in the case that the session active checker determines that the other packet belonging to the identified session is currently stored in the plurality of FIFO queues, the session active checker temporarily stores the received packet and retrieves another received packet from the input buffer.

5. A process for processing received packets, comprising:

holding at least one received packet in an input buffer

storing, in a plurality of first-in first-out (FIFO) queues, packets for processing by a corresponding plurality of packet processors, each of the plurality of FIFO queues having predetermined number of slots to store packets

storing, in a session active memory, a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues

prior to sending the received packet from the input buffer to one of the plurality of FIFO queues

extracting a session identifier from the received packet to identifying a session associated with the received packet

comparing the session identifier extracted from the received packet with the plurality of session identifiers stored in the session action memory to determine if any other packet belonging to the identified session is currently stored in the FIFO queues

when no other packets belonging to the identified session are currently stored in the FIFO queues, sending the received packet to a selected one of the plurality of FIFO queues

when another packet belonging to the identified session is currently being processed by one of the plurality of packet processors, waiting until the processing of the other packet is complete before sending the received packet to the selected FIFO queue.

6. The process of claim 5 , wherein the session active memory stores a valid bit associated with each of the session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of FIFO queues.

7. The process of claim 6 , wherein

each of the plurality of FIFO queues includes an associated read pointer and an associated write pointer

the process further comprising setting and resetting the valid bits stored in the session active memory in accordance with the values of the read pointers and write pointers associated with the plurality of FIFO queues.

8. The process of claim 5 , further comprising:

storing a plurality of received packets in the input buffer

in the case that the session active checker determines that the other packet belonging to the identified session is currently stored in one of the plurality of FIFO queues, temporarily storing the received packet and retrieving another received packet from the input buffer.

9. A non-transitory computer readable storage medium having programming code stored thereon which, when used to program a field programmable gate array, will cause the field programmable gate array to be configured as an apparatus for processing received packets, the apparatus comprising:

a plurality of packet processors

a session active checker to distribute received packets among the plurality of packet processors

a plurality of first-in first-out (FIFO) queues to store packets sent from the session active checker to a corresponding one of the plurality of packet processors, each queue having a predetermined number of slots to store packets

wherein the session active checker comprises:

a session active memory adapted to store a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues

logic that extracts a session identifier from a received packet to identify a session associated with the received packet

a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory to determine if any other packet belonging to the identified session is currently stored in any of the plurality of FIFO queues

logic that sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently stored in the plurality of FIFO queues, wherein

in the case that the session active checker determines that another packet belonging to the identified session is currently stored in the plurality of FIFO queues, the session active checker waits until the processing of the other packet is complete before sending the received packet to the selected packet processor.

10. The non-transitory computer readable storage medium of claim 9 , wherein the session active memory stores a valid bit associated with each of the plurality of session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of FIFO queues.

11. The non-transitory computer readable storage medium of claim 10 , wherein

each of the plurality of FIFO queues includes an associated read pointer and an associated write pointer

the valid bits stored in the session active memory are set and reset in accordance with the values of the read pointers and write pointers associated with the plurality of FIFO queues.

12. The non-transitory computer readable storage medium of claim 9 , the apparatus further comprising

an input buffer adapted to store a plurality of received packets

wherein, in the case that the session active checker determines that the other packet belonging to the identified session is currently stored one of the plurality of FIFO queues, the session active checker temporarily stores the received packet and retrieves another received packet from the input buffer.

13. An apparatus for processing received packets, comprising:

a plurality of packet processors

a session active checker comprising logic that

identifies a session associated with a received packet

determines if any other packet belonging to the identified session is currently being processed by any of the plurality of packet processors

sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently being processed, wherein

in the case that the session active checker determines that another packet belonging to the identified session is currently being processed by a specific packet processor, the session active checker sends the received packet to the specific packet processor, waiting when necessary for a slot to become available in a first-in first-out queue corresponding to the specific packet processor.

14. The apparatus of claim 13 , the session active checker further comprising:

logic that extracts a session identifier from the received packet

a session active memory that stores session identifiers of all packets currently being processed by any of the plurality of packet processors

a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory.

15. The apparatus of claim 14 , further comprising:

a plurality of first-in first-out queues, each queue adapted to store packets sent from the session active checker to a corresponding one of the plurality of packet processors

wherein the session active memory stores session identifiers for all packets stored in the plurality of first-in first-out queues.

16. The apparatus of claim 15 , wherein

each of the first-in first-out queues includes a predetermined number of slots to store packets

the session active memory is adapted to store a plurality of session identifiers corresponding to the slots in the plurality of first-in first-out queues.

17. The apparatus of claim 16 , wherein the session active memory stores a valid bit associated with each of the plurality of session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of first-in first-out queues.

18. The apparatus of claim 17 , wherein

each of the plurality of first-in first-out queues includes an associated read pointer and an associated write pointer

the valid bits stored in the session active memory are set and reset in accordance with the values of the read pointers and write pointers associated with the plurality of first-in first-out queues.

19. A process for processing received packets, comprising:

holding at least one received packet in an input buffer

prior to sending the received packet from the input buffer to one of a plurality of packet processors

identifying a session associated with the received packet

determining if any other packet belonging to the -session is currently being processed by any of the plurality of packet processors

when no other packets belonging to the identified session are currently being processed, sending the received packet to a selected one of a plurality of packet processors

when another packet belonging to the identified session is currently being processed by a specific packet processor, waiting until an empty slot is available in a first-in first-out queue corresponding to the specific packet processor, and then sending the received packet to the specific packet processor.

20. The process of claim 19 , further comprising:

storing session identifiers of all packets being processed by the plurality of packet processors in a session active memory

wherein identifying a session comprises extracting a session identifier from the received packet

wherein determining if any other packet belonging to the session is currently being processed by any of a plurality of packet processors comprises comparing the session identifier extracted from the received packet with the plurality of session identifiers stored in the session active memory.

21. The process of claim 20 , wherein

a plurality of first-in first-out queues are coupled to the plurality of packet processors, each first-in first-out queue adapted to store packets sent from the session active checker to a corresponding packet processor

wherein the session active memory stores session identifiers for all packets stored in the plurality of first-in first-out queues.

22. The process of claim 21 , wherein

each of the first-in first-out queues includes a predetermined number of slots to store packets

the session active memory is adapted to store a session identifier corresponding to each of the slots in the plurality of first-in first-out queues.

23. The process of claim 22 , wherein the session active memory stores a valid bit associated with each of the session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of first-in first-out queues.

24. The process of claim 23 , wherein

each of the plurality of first-in first-out queues includes an associated read pointer and an associated write pointer

the process further comprising setting and resetting the valid bits stored in the session active memory in accordance with the values of the read pointers and write pointers associated with the plurality of first-in first-out queues.

25. A non-transitory computer readable storage medium having programming code stored thereon which, when used to program a field programmable gate array, will cause the field programmable gate array to be configured as an apparatus for processing received packets, the apparatus comprising:

a plurality of packet processors

a session active checker comprising logic that

identifies a session associated with a received packet

determines if any other packet belonging to the identified session is currently being processed by any of the plurality of packet processors

sends the received packet to a selected one of the plurality of packet processors in the case that no other packets belonging to the identified session are currently being processed, wherein

in the case that the session active checker determines that another packet belonging to the identified session is currently being processed by a specific packet processor, the session active checker waits until an empty slot is available in a first-in first-out queue corresponding to the specific packet processor, and then sends the received packet to the specific packet processor.

26. The computer readable storage medium of claim 25 , the apparatus further comprising:

logic that extracts a session identifier from the received packet

a session active memory that stores session identifiers of all packets currently being processed by any of the plurality of packet processors

a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory.

27. The computer readable storage medium of claim 26 , the apparatus further comprising:

a plurality of first-in first-out queues, each queue adapted to store packets sent from the session active checker to a corresponding one of the plurality of packet processors

wherein the session active memory stores session identifiers for all packets stored in the plurality of first-in first-out queues.

28. The computer readable storage medium of claim 27 , wherein

each of the first-in first-out queues includes a predetermined number of slots to store packets

the session active memory is adapted to store a plurality of session identifiers corresponding to the slots in the plurality of first-in first-out queues.

29. The computer readable storage medium of claim 28 , wherein the session active memory stores a valid bit associated with each of the plurality of session identifiers, the valid bit indicating if a packet is stored in the corresponding slot in the plurality of first-in first-out queues.

30. The computer readable storage medium of claim 29 , wherein

each of the plurality of first-in first-out queues includes an associated read pointer and an associated write pointer

the valid bits stored in the session active memory are set and reset in accordance with the values of the read pointers and write pointers associated with the plurality of first-in first-out queues.