IP Library Granted Patent US 7,975,228
Granted Patent B2
US 7,975,228 · App. 12/505,996 · Granted Jul 5, 2011

Synchronizing graphical programs executing on respective computer systems

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Quick Facts
Patent No.
US 7,975,228
App. No.
12/505,996
Granted
Jul 5, 2011
Kind
B2
Abstract

A first graphical program executing on a first device may execute a first graphical code portion for a plurality of iteration. Various systems and methods for synchronizing the execution of the iterations of the first graphical code portion with graphical code portions executing iteratively in graphical programs on other devices are described. Various systems and methods for synchronizing the execution of the iterations of the first graphical code portion with operation of measurement devices or other devices are also described.

Claims (74)

1. A system comprising:

a first device coupled to a network, wherein the first device executes a first graphical program, wherein the first graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the first graphical program, wherein the plurality of interconnected nodes comprises a first node and one or more function nodes associated with the first node;

a second device coupled to the network;

wherein the first graphical program is operable to execute a first graphical code portion comprising the one or more function nodes, wherein the execution of the first graphical code portion is timed based on a specified timing source and a specified timing period;

wherein the specified timing source specifies a tick based on at least one of:

a clock of the second device; or

events originating from the second device; and

wherein the specified timing period specifies a number of ticks required to trigger execution of the first graphical code portion;

wherein the first node is configured to use a clock signal synchronized over the network to the clock of the second device; and

wherein to execute the first graphical code portion, the first node is executable to cause the one or more function nodes to execute in response to occurrence of the specified number of ticks of the clock signal.

2. The system of claim 1 , wherein the first graphical program is operable to execute the first graphical code portion for a plurality of iterations, wherein each iteration of the first graphical code portion is triggered by the specified timing source per the specified timing period.

3. The system of claim 1 , further comprising:

a third device coupled to the network, wherein the third device executes a second graphical program;

wherein the second graphical program is operable to execute a second graphical code portion for a plurality of iterations, wherein the iterations of the second graphical code portion are timed based on the clock of the second device;

wherein the iterations of the first graphical code portion are timed based on the clock of the second device; and

wherein the clock of the second device provides a common timing source for synchronizing the iterations of the first graphical code portion in the first graphical program executing on the first device with the iterations of the second graphical code portion in the second graphical program executing on the third device.

4. The system of claim 3 , further comprising:

a third device coupled to the network, wherein the third device comprises a measurement device;

wherein a clock of the measurement device is synchronized with the clock of the second device;

wherein the iterations of the first graphical code portion are timed based on the clock of the second device; and

wherein the clock of the second device provides a common timing source for synchronizing the iterations of the first graphical code portion in the first graphical program with operation of the measurement device.

5. The system of claim 1 , further comprising:

a third device coupled to the first device, wherein the third device comprises a measurement device;

wherein a clock of the measurement device is synchronized with the clock of the second device;

wherein the iterations of the first graphical code portion are timed based on the clock of the second device; and

wherein the clock of the second device provides a common timing source for synchronizing the iterations of the first graphical code portion in the first graphical program with operation of the measurement device.

6. The system of claim 1 ,

wherein the second device executes a second graphical program;

wherein the second graphical program is operable to execute a second graphical code portion for a plurality of iterations, wherein the iterations of the second graphical code portion are timed based on the clock of the second device;

wherein the iterations of the first graphical code portion are timed based on the clock of the second device; and

wherein the clock of the second device provides a common timing source for synchronizing the iterations of the first graphical code portion in the first graphical program executing on the first device with the iterations of the second graphical code portion in the second graphical program executing on the second device.

7. The system of claim 1 , wherein the first graphical code portion comprises a sequence of sub-portions to be executed sequentially, wherein each sub-portion comprises one or more nodes; and

wherein said executing the first graphical code portion comprises sequentially executing the sequence of sub-portions, wherein the execution of one or more of the sub-portions is timed based on the at least one of:

the clock of the second device; or

the events originating from the second device.

8. The system of claim 1 ,

wherein the second device comprises a measurement device.

9. A non-transitory computer accessible memory medium that stores program instructions for creating a first graphical program, wherein the program instructions are executable by a processor to implement:

a first graphical program executable on a first device coupled to a network, wherein the first graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the first graphical program, wherein the plurality of interconnected nodes comprises a first node and one or more function nodes associated with the first node, wherein the first graphical program is operable to execute a first graphical code portion comprising the one or more function nodes, wherein the execution of the first graphical code portion is timed based on a specified timing source and a specified timing period;

wherein the specified timing source specifies a tick based on at least one of:

a clock of a second device coupled to the network; or

events originating from the second device; and

wherein the specified timing period specifies a number of ticks required to trigger execution of the first graphical code portion;

wherein the first node is configured to use a clock signal synchronized over the network to the clock of the second device; and

wherein to execute the first graphical code portion, the first node is executable to cause the one or more function nodes to execute in response to occurrence of the specified number of ticks of the clock signal.

10. The non-transitory computer accessible memory medium of claim 9 ,

wherein to execute the first graphical code portion, the first node is executable to execute a timed loop for a plurality of iterations, wherein the one or more function nodes are executed in each iteration, wherein the iterations are timed based on the clock of the second device in accordance with the specified timing period.

11. The non-transitory computer accessible memory medium of claim 10 ,

wherein the first node visually indicates that the one or more function nodes are executed for the plurality of iterations.

12. The non-transitory computer accessible memory medium of claim 10 ,

wherein the first node comprises an interior portion; and

wherein the one or more function nodes are displayed within the interior portion of the first node.

13. The non-transitory computer accessible memory medium of claim 9 ,

wherein the one or more function nodes comprise a plurality of graphical code portions to be executed in a sequential order;

wherein the first node is operable to execute the plurality of graphical code portions in the sequential order in response to receiving the first network event.

14. A computer-implemented method for creating and executing a graphical program on a first device, the method comprising utilizing a computer to perform:

displaying a first node in the graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program, wherein the plurality of interconnected nodes comprises the first node and one or more function nodes associated with the first node, wherein the first node has an appearance that visually indicates control of timing of execution of nodes associated with the first node, wherein the graphical program is operable to execute a first graphical code portion comprising the one or more function nodes;

displaying the one or more function nodes associated with the first node;

configuring timing information for the first node based on a specified timing source and a specified timing period in response to user input;

wherein the specified timing source specifies a tick based on at least one of:

a clock of a second device coupled to the first device via a network; or

events originating from the second device;

wherein the specified timing period specifies a number of ticks required to trigger execution of the first graphical code portion; and

executing the first graphical code portion, including executing the first node to cause the one or more function nodes to execute in response to occurrence of the specified number of ticks of the clock.

15. The method of claim 14 , wherein said executing the first graphical code portion comprises:

the first node executing a timed loop for a plurality of iterations, wherein the one or more function nodes are executed in each iteration, wherein the iterations are timed based on the clock of the second device in accordance with the specified timing period.

16. The method of claim 15 ,

wherein the first node visually indicates that the one or more function nodes are executed for the plurality of iterations.

17. The method of claim 15 ,

wherein the first node comprises an interior portion; and

wherein the one or more function nodes are displayed within the interior portion of the first node.

18. The method of claim 14 ,

wherein the one or more function nodes comprise a plurality of graphical code portions to be executed in a sequential order;

wherein said executing the first node to cause the one or more function nodes to execute comprises the first node executing the plurality of graphical code portions in the sequential order based on the clock of the second device in accordance with the specified timing period.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2009
From: VRANCIC, ALJOSA; KORNERUP, JACOB
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 022978/0367 →