Liquid crystal display having reduced kickback effect

1. A liquid crystal display comprising:

a plurality of gate lines including gate line, a second gate line and a third gate line each extending in a first direction;

a plurality of data lines including a first data line and a second data line each extending in a second direction orthogonal to the first direction;

a first pixel formed between the first gate line, the second gate line, the first data line and the second data line, and having a first subpixel configured to have applied thereto a first data voltage and a second subpixel configured to have applied thereto a second data voltage lower than the first data voltage;

a second pixel formed between the second gate line, the third gate line, the first data line and the second data line, and having a third subpixel configured to have applied thereto a third data voltage and a fourth subpixel configured to have applied thereto a fourth data voltage lower than the third data voltage,

wherein the first subpixel and the third subpixel are connected to a first thin film transistor and a third thin film transistor respectively, the first thin film transistor and the third thin film transistor have source electrodes connected to the first data line and the second data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the third thin film transistor.

2. The liquid crystal display of claim 1 , wherein the second subpixel and the fourth subpixel are connected to a second thin film transistor and a fourth thin film transistor respectively, the second thin film transistor and the fourth thin film transistor have source electrodes connected to the second data line and the first data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the second thin film transistor is opposite to an open direction of the source electrode of the fourth thin film transistor.

3. The liquid crystal display of claim 2 , wherein the open direction of the source electrode of the first thin film transistor is opposite to the open direction of the source electrode of the second thin film transistor, and

wherein the open direction of the source electrode of the third thin film transistor is opposite to the open direction of the source electrode of the fourth thin film transistor.

4. A liquid crystal display comprising:

a plurality of gate lines including a first gate line and a second gate line each extending in a first direction;

a plurality of data lines including a first data line, a second data line, a third data line and a fourth data line each extending in a second direction orthogonal to the first direction;

a first pixel formed between the first gate line, the second gate line, the first data line and the second data line, and having a first subpixel configured to have applied thereto a first data voltage and a second subpixel configured to have applied thereto a second data voltage lower than the first data voltage;

a second pixel formed between the first gate line, the second gate line, the third data line and the fourth data line, and having a third subpixel configured to have applied thereto a third data voltage and a fourth subpixel configured to have applied thereto a fourth data voltage lower than the third data voltage,

wherein the first subpixel and the third subpixel are connected to a first thin film transistor and a third thin film transistor respectively, the first thin film transistor and the third thin film transistor have source electrodes connected to the second data line and the third data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the third thin film transistor.

5. The liquid crystal display of claim 4 , wherein the second subpixel and the fourth subpixel are connected to a second thin film transistor and a fourth thin film transistor respectively, the second thin film transistor and the fourth thin film transistor have source electrodes connected to the first data line and the fourth data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the second thin film transistor is opposite to an open direction of the source electrode of the fourth thin film transistor.

6. The liquid crystal display of claim 5 , wherein the open direction of the source electrode of the first thin film transistor is opposite to the open direction of the source electrode of the second thin film transistor, and

wherein the open direction of the source electrode of the third thin film transistor is opposite to the open direction of the source electrode of the fourth thin film transistor.

7. The liquid crystal display of claim 6 , wherein the second data line and the third data line are positioned between the first pixel and the second pixel.

8. The liquid crystal display of claim 4 , wherein the second data line and the third data line are positioned between the first pixel and the second pixel.

9. A liquid crystal display comprising:

a plurality of gate lines including a first gate line, a second gate line and a third gate line each extending in a first direction;

a plurality of data lines including a first data line, a second data line, a third data line and a fourth data line each extending in a second direction orthogonal to the first direction;

a first pixel formed between the first gate line, the second gate line, the first data line and the second data line, and having a first subpixel configured to have applied thereto a first data voltage and a second subpixel configured to have applied thereto a second data voltage lower than the first data voltage;

a second pixel formed between the second gate line, the third gate line, the first data line and the second data line, and having a third subpixel configured to have applied thereto a third data voltage and a fourth subpixel configured to have applied thereto a fourth data voltage lower than the third data voltage;

a third pixel formed between the first gate line, the second gate line, the third data line and the fourth data line, and having a fifth subpixel configured to have applied thereto a fifth data voltage and a sixth subpixel configured to have applied thereto a sixth data voltage lower than the fifth data voltage,

wherein the first, third and fifth subpixels are connected to first, third and fifth thin film transistors respectively, the first, third and fifth thin film transistors have source electrodes connected to the first, second and fourth data lines respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the third thin film transistor, and

wherein the open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the fifth thin film transistor.

10. The liquid crystal display of claim 9 , wherein the second, fourth and sixth subpixels are connected to second, fourth and sixth thin film transistors respectively, the second, fourth and sixth thin film transistors have source electrodes connected to the second, first, and third data lines respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and

wherein an open direction of the source electrode of the second thin film transistor is opposite to an open direction of the source electrode of the fourth thin film transistor, and

wherein the open direction of the source electrode of the second thin film transistor if opposite to an open direction of the source electrode of the sixth thin film transistor.

11. The liquid crystal display of claim 10 , wherein the open direction of the source electrode of the first thin film transistor is opposite to the open direction of the source electrode of the second thin film transistor,

wherein the open direction of the source electrode of the third thin film transistor is opposite to the open direction of the source electrode of the fourth thin film transistor, and

wherein the direction of the source electrode of the fifth thin film transistor is opposite to the open direction of the source electrode of the sixth thin film transistor.

12. The liquid crystal display of claim 10 , wherein the second data line and the third data line are positioned between the first pixel and the third pixel.

13. The liquid crystal display of claim 11 , wherein the second data line and the third data line are positioned between the first pixel and the third pixel.