IP Library Granted Patent US 8,164,152
Granted Patent B2
US 8,164,152 · App. 12/509,893 · Granted Apr 24, 2012

Liquid crystal display and method of manufacturing the same

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Quick Facts
Patent No.
US 8,164,152
App. No.
12/509,893
Granted
Apr 24, 2012
Kind
B2
Abstract

A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.

Claims (21)

1. A liquid crystal display comprising:

an insulating substrate;

a gate electrode formed on the insulating substrate;

an oxide semiconductor layer formed on the gate electrode;

an etch stopper formed on the oxide semiconductor layer in a channel area;

a common electrode formed on the insulating substrate;

source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer;

a passivation layer formed on the etch stopper, the common electrode, and the source and drain electrodes; and

a pixel electrode formed on the passivation layer and connected to the drain electrode.

2. The liquid crystal display of claim 1 , wherein the oxide semiconductor layer comprises an oxide of a material selected from Zn, In, Ga, Sn, and combinations thereof.

3. The liquid crystal display of claim 1 , wherein the source electrode includes a lower source layer and an upper source layer, and the drain electrode includes a lower drain layer and an upper drain layer.

4. The liquid crystal display of claim 3 , wherein the lower source layer and the upper source layer have substantially the same patterns with each other, and the lower drain layer and the upper drain layer have substantially the same patterns with each other.

5. The liquid crystal display of claim 3 , wherein the lower source layer and the lower drain layer are formed of the same material and from the same layer as the common electrode.

6. The liquid crystal display of claim 5 , wherein the lower source layer, the lower drain layer, and the common electrode are made of oxide with indium (In), zinc (Zn), or tin (Sn).

7. The liquid crystal display of claim 3 , wherein the upper source layer and the upper drain layer are made of aluminum (Al), copper (Cu), silver (Ag), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), nickel (Ni), cobalt (Co), or alloys thereof.

8. The liquid crystal display of claim 1 , wherein the etch stopper is made of oxide, nitride, or oxynitride.

9. The liquid crystal display of claim 1 , further comprising a common electrode line arranged on the insulating substrate in parallel with the gate electrode, wherein the common electrode line is connected to the common electrode.

10. The liquid crystal display of claim 1 , further comprising a common electrode connecting portion for connecting common electrodes formed at adjacent pixels, wherein the common electrode connecting portion is formed of the same material and from the same layer as the common electrode.

11. The liquid crystal display of claim 1 , further comprising an additional gate electrode provided on the passivation layer, the additional gate electrode overlapping with the gate electrode.

12. The liquid crystal display of claim 11 , wherein the additional gate electrode is connected to the gate electrode through a contact hole formed in the passivation layer.

13. The liquid crystal display of claim 1 , wherein the pixel electrode includes a plurality of main field generating portions separated from each other by cut-out portions, and includes connecting portions connecting the plurality of main field generating portions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029045/0860 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2009
From: LEE, JE-HUN; KIM, DO-HYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023010/0342 →