Circuit arrangement for controlling a high side CMOS transistor in a high voltage deep sub micron process
View Patent ↗The present invention relates to a circuit arrangement, which is used for controlling a high side CMOS transistor (M 1 ) in a high voltage deep sub micron process. To provide a circuit arrangement for switching a high side CMOS transistor (M 1 ) in a circuit having a very thin gate oxide, produced by a deep sub micron process, a circuit arrangement is proposed for controlling a high side CMOS transistor (M 1 ), wherein the high side CMOS transistor (M 1 ) is coupled between a high side voltage potential (Vbat) and a control output (OUT) for switching an external device, the high side CMOS transistor (M 1 ) is controlled at its gate by a reference potential (Vbat-Vref), which is provided by a high side voltage reference ( 11 ) having a capacitor (C 1 ), which is charged for switching on and discharged for switching off the high side CMOS transistor (M 1 ).
1. A circuit for protecting a Complementary Metal Oxide Semiconductor (CMOS) transistor from a high voltage supply, the circuit comprising:
a first switching transistor coupled between the high voltage supply and the gate of the CMOS transistor;
a reference circuit coupled between the gate of the CMOS transistor and the high voltage supply, wherein the reference circuit comprises:
a diode coupled between the gate of the CMOS transistor and a reference voltage, and
a first resistor coupled between the high voltage supply and the reference voltage,
a capacitor coupled between the high voltage supply and the gate of the CMOS transistor; and
a current source coupled between the reference circuit and a gate of the first switching transistor, wherein the current source switches the CMOS transistor on and off by charging and discharging the capacitor.
2. A circuit for protecting a Complementary Metal Oxide Semiconductor (CMOS) transistor from a high voltage supply, the circuit comprising:
a first switching transistor coupled between the high voltage supply and the gate of the CMOS transistor;
a reference circuit coupled between the gate of the CMOS transistor and the high voltage supply, wherein the reference circuit comprises a capacitor coupled between the high voltage supply and the gate of the CMOS transistor; and
a current source coupled between the reference circuit and a gate of the first switching transistor, wherein the current source switches the CMOS transistor on and off by charging and discharging the capacitor and comprises a second switching transistor coupled between the reference voltage and a second resistor.
3. The circuit of claim 2 , wherein the current source further comprises:
a third switching transistor coupled to the gate of the first switching transistor.
4. The circuit of claim 2 , wherein application of a sufficient number of pulses to the gate of the second switching transistor charges the capacitor.
5. The circuit of claim 2 , wherein application of a sufficient number of pulses to the gate of the second switching transistor turns the CMOS transistor on.
6. The circuit of claim 3 , wherein application of a sufficient number of pulses to the gate of the third switching transistor discharges the capacitor.
7. The circuit of claim 3 , wherein application of a sufficient number of pulses to the gate of the third switching transistor turns the CMOS transistor off.
8. A circuit for protecting a Complementary Metal Oxide Semiconductor (CMOS) transistor from a high voltage supply, the circuit comprising:
a first switching transistor coupled between the high voltage supply and the gate of the CMOS transistor;
a reference circuit coupled between the gate of the CMOS transistor and the high voltage supply, wherein the reference circuit further comprises a capacitor coupled between the high voltage supply and the gate of the CMOS transistor; and
a current source coupled between the reference circuit and a gate of the first switching transistor, wherein the current source switches the CMOS transistor on and off by charging and discharging the capacitor; and
a resistor coupled between the high voltage supply and the gate of the first switching transistor.