IP Library Patent Application 12519006
Patent Application
App. No. 12/519,006

RECEIVER AND RECEIVING SYSTEM USING THE SAME

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Quick Facts
Patent No.
US None
App. No.
12/519,006
Abstract

If receiving circuit is in a high-sensitivity mode, receiving circuit is switched to a low-sensitivity mode when the BER according to BER measurement circuit becomes more favorable than a release threshold. If receiving circuit is in the low-sensitivity mode, receiving circuit is switched to the high-sensitivity mode when the BER according to BER measurement circuit becomes more adverse than a start-up threshold. If switching between the high-sensitivity and low-sensitivity modes occurs, control is exercised so that switching from the high-sensitivity mode to the low is resistant to occurring, thereby suppressing the occurrence of a reception error caused by switching between the receiving modes.

Claims (47)

1 .- 25 . (canceled)

26 . A receiving apparatus comprising:

a receiving circuit having a high-sensitivity mode and a low-sensitivity mode with sensitivity lower than the high-sensitivity mode;

a reception quality judging circuit judging reception quality of a reception signal output from the receiving circuit; and

a control circuit controlling switching between the high-sensitivity mode and the low-sensitivity mode according to a signal from the reception quality judging circuit,

wherein,

if the receiving circuit is in the high-sensitivity mode, the control circuit switches the receiving circuit to the low-sensitivity mode when a judgement result according to the reception quality judging circuit becomes more favorable than a release threshold; and

if the receiving circuit is in the low-sensitivity mode, the control circuit switches the receiving circuit to the high-sensitivity mode when a judgement result according to the reception quality judging circuit becomes more adverse than a start-up threshold, and

wherein, if switching between the high-sensitivity mode and the low-sensitivity mode occurs, the control circuit exercises control so that switching from the high-sensitivity mode to the low-sensitivity mode is difficult.

27 . The receiving apparatus of claim 26 , wherein, if switching between the high-sensitivity mode and the low-sensitivity mode occurs, the control circuit exercises control so that switching from the high-sensitivity mode to the low-sensitivity mode is difficult by making the release threshold more favorable.

28 . The receiving apparatus of claim 27 , wherein the control circuit returns the release threshold to an initial value if a state in which a judgement result according to the reception quality judging circuit is more favorable than the release threshold continues for a given time.

29 . The receiving apparatus of claim 26 ,

wherein the control circuit switches the receiving circuit from the high-sensitivity mode to the low-sensitivity mode if a state in which a judgement result according to the reception quality judging circuit is more favorable than the release threshold continues for a given time, and

wherein the control circuit exercises control so that switching from the high-sensitivity mode to the low-sensitivity mode is difficult by further increasing the given time if switching between the high-sensitivity mode and the low-sensitivity mode occurs.

30 . The receiving apparatus of claim 26 ,

wherein the receiving unit includes a first receiving circuit, a second receiving circuit, and a selecting or combining unit connected to an output side of the first receiving circuit and an output side of the second receiving circuit;

wherein the high-sensitivity mode is a mode in which the selecting or combining circuit performs reception using the first receiving circuit and the second receiving circuit; and

wherein the low-sensitivity mode is a mode in which the selecting or combining circuit performs reception using either one of the first receiving circuit and the second receiving circuit.

31 . The receiving apparatus of claim 27 ,

wherein the receiving unit includes a first receiving circuit, a second receiving circuit, and a selecting or combining unit connected to an output side of the first receiving circuit and an output side of the second receiving circuit;

wherein the high-sensitivity mode is a mode in which the selecting or combining unit performs reception using the first receiving circuit and the second receiving circuit; and

wherein the low-sensitivity mode is a mode in which the selecting or combining unit performs reception using either one of the first receiving circuit and the second receiving circuit.

32 . The receiving apparatus of claim 28 ,

wherein the receiving unit includes a first receiving circuit, a second receiving circuit, and a selecting or combining unit connected to an output side of the first receiving circuit and an output side of the second receiving circuit;

wherein the high-sensitivity mode is a mode in which the selecting or combining unit performs reception using the first receiving circuit and the second receiving circuit; and

wherein the low-sensitivity mode is a mode in which the selecting or combining unit performs reception using either one of the first receiving circuit and the second receiving circuit.

33 . The receiving apparatus of claim 29 ,

wherein the receiving unit includes a first receiving circuit, a second receiving circuit, and a selecting or combining unit connected to an output side of the first receiving circuit and an output side of the second receiving circuit;

wherein the high-sensitivity mode is a mode in which the selecting or combining unit performs reception using the first receiving circuit and the second receiving circuit; and

wherein the low-sensitivity mode is a mode in which the selecting or combining unit performs reception using either one of the first receiving circuit and the second receiving circuit.

34 . The receiving apparatus of claim 26 , wherein the low-sensitivity mode is implemented by restricting a current inside the receiving unit in the high-sensitivity mode.

35 . The receiving apparatus of claim 27 , wherein the low-sensitivity mode is implemented by restricting a current inside the receiving unit in the high-sensitivity mode.

36 . The receiving apparatus of claim 28 , wherein the low-sensitivity mode is implemented by restricting a current inside the receiving unit in the high-sensitivity mode.

37 . The receiving apparatus of claim 29 , wherein the low-sensitivity mode is implemented by restricting a current inside the receiving unit in the high-sensitivity mode.

38 . The receiving apparatus of claim 28 , wherein the low-sensitivity mode is implemented by decreasing the number of stages of an IF filter inside the receiving unit in the high-sensitivity mode.

39 . The receiving apparatus of claim 26 , wherein the control circuit returns the release threshold to an initial value if a state in which a judgement result according to the reception quality judging circuit is more favorable than the release threshold continues for a given time.

40 . The receiving apparatus of claim 28 , wherein the control circuit returns the release threshold to an initial value if a state in which a judgement result according to the reception quality judging circuit is more favorable than the release threshold continues for a given time.

41 . The receiving apparatus of claim 28 , wherein the reception quality judging circuit judges reception quality using an error rate of a reception signal.

42 . The receiving apparatus of claim 29 , wherein the reception quality judging circuit judges reception quality using an error rate of a reception signal.

43 . The receiving apparatus of claim 28 , wherein the reception quality judging circuit judges reception quality using a C/N ratio of a reception signal.

44 . The receiving apparatus of claim 29 , wherein the reception quality judging circuit judges reception quality using a C/N ratio of a reception signal.

45 . The receiving apparatus of claim 28 , wherein the reception quality judging circuit judges reception quality using a reception level of a reception signal.

46 . The receiving apparatus of claim 29 , wherein the reception quality judging circuit judges reception quality using a reception level of a reception signal.

47 . A receiving system comprising a decoding unit sequentially connected to the receiving apparatus of claim 26 and to an output side of the receiving apparatus, and a display unit.

48 . A receiving system comprising a decoding unit sequentially connected to the receiving apparatus of claim 27 and to an output side of the receiving apparatus, and a display unit.

49 . A receiving system comprising a decoding unit sequentially connected to the receiving apparatus of claim 28 and to an output side of the receiving apparatus, and a display unit.

50 . A receiving system comprising a decoding unit sequentially connected to the receiving apparatus of claim 29 and to an output side of the receiving apparatus, and a display unit.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2009
From: TSUKIO, YASUNOBU; OZEKI, HIROAKI
To: PANASONIC CORPORATION
Reel/Frame 022922/0374 →