IP Library Granted Patent US 8,411,231
Granted Patent B2
US 8,411,231 · App. 12/519,144 · Granted Apr 2, 2013

Distortion tolerant pixel design

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Quick Facts
Patent No.
US 8,411,231
App. No.
12/519,144
Granted
Apr 2, 2013
Kind
B2
Abstract

A pixel architecture for compensating for distortions in a flexible substrate of a flexible display, including: a first layer including a thin film transistor (TFT) on a flexible substrate; a second layer disposed above said first layer including a pixel electrode coupled to said TFT for receiving a signal from said TFT; and a third layer including a color filter for filtering light displayed by said pixel, wherein said third layer is aligned to said second layer such that said color filter is substantially aligned to said pixel electrode, said alignment compensating for distortions in said first layer caused by distortions in said flexible substrate.

Claims (49)

1. A pixel architecture for compensating for distortions in a flexible substrate of a

flexible display, comprising:

a first layer comprising a plurality of thin film transistors arranged in a first array on a flexible substrate;

a second layer disposed above said first layer comprising a plurality of pixel electrodes arranged in a second array such that each of said plurality of pixels is coupled to a respective thin film transistor in said first array for receiving a signal from said respective thin film transistor; and

a third layer comprising a plurality of colour filters arranged in a third array with each colour filter for filtering light displayed by a pixel in said array, wherein said third array has the same pattern as said second array whereby said third layer is aligned to said second layer such that each said colour filter is aligned to said pixel electrode, thereby compensating for distortions in said first array caused by distortions in said flexible substrate.

2. A pixel architecture according to claim 1 , wherein each of said pixel electrode is shaped to enable said pixel electrode to be displaced laterally with respect to said thin film transistor during manufacture of said pixel, said displacement being caused by distortions in said flexible substrate.

3. A pixel architecture according to claim 1 , wherein each said coupling between said electrode and thin film transistor comprises a via connector between said electrode and said thin film transistor.

4. A pixel architecture according to claim 3 , wherein a maximum lateral displacement between each of said coupled electrodes and said thin film transistor is less than half of a difference between a dimension of said electrode and a diameter of said via connector.

5. A pixel architecture according to claim 1 , further comprising:

a display medium disposed between said second and third layers, said display medium being responsive to signals on said pixel electrodes.

6. A pixel architecture according to claim 5 wherein said display medium comprises an electrophoretic display medium.

7. A pixel architecture according to claim 5 , wherein said display medium comprises a liquid crystal medium.

8. A pixel architecture according to claim 1 , wherein said substrate comprises polyethyleneterephtalate (PET) or polyethylenenaphtalene (PEN).

9. A pixel architecture according to claim 1 , wherein said thin film transistor comprises an organic semiconductor.

10. A pixel architecture according to claim 9 , wherein said organic semiconductor is a solution-processed organic semiconductor.

11. A flexible display comprising:

a first layer comprising a plurality of thin film transistors arranged in a first array on a flexible substrate;

a second layer disposed above said first layer comprising a plurality of pixel electrodes arranged in a second array, each of said pixel electrodes being coupled to a respective thin film transistor for receiving a signal from said respective thin film transistor;

a display medium for displaying an image, said medium being disposed on said second layer, and said display medium being responsive to signals on said pixel electrodes; and

a third layer comprising a plurality of colour filters arranged in a third array for filtering an image displayed on said display,

wherein said third array has the same pattern as said second array whereby said third layer is aligned to said second layer such that each of said colour filters is substantially aligned to a respective pixel electrode, and wherein at least some of said pixel electrodes and colour filters are misaligned with said thin film transistor, thereby compensating for distortions in said first layer caused by distortions in said flexible substrate.

12. A flexible display according to claim 11 wherein each of said pixel electrodes is shaped to enable said pixel electrodes to be displaced laterally with respect to said thin film transistors during manufacture of said display, said displacement being caused by distortions in said flexible substrate.

13. A flexible display according to claim 11 , wherein said coupling between a said pixel electrode and a said respective thin film transistor comprises a via connector between said electrode and said thin film transistor.

14. A flexible display according to claim 13 , wherein a lateral position of said via connector relative to a said pixel electrode varies by at least 5 μm, 10 μm or 20 μm across said array.

15. A flexible display according to claim 14 , wherein a maximum lateral displacement between a said electrode and a said thin film transistor is less than half of a difference between a dimension of said electrode and a diameter of said via connector.

16. A flexible display according to claim 12 , wherein said display medium comprises an electrophoretic display medium.

17. A flexible display according to claim 12 wherein said display medium comprises a liquid crystal display medium.

18. A flexible display according to claim 12 , wherein said substrate comprises polyethyleneterephtalate (PET) or polyethylenenaphtalene (PEN).

19. A flexible display according to claim 12 , wherein said thin film transistor comprises an organic semiconductor.

20. A flexible display architecture according to claim 19 , wherein said organic semiconductor is a solution-processed organic semiconductor.

21. A method of compensating for distortion when manufacturing a pixel for a display, the pixel comprising: a first layer comprising a plurality of thin film transistors arranged in a first array on a flexible substrate; a second layer disposed above said first layer comprising a plurality of pixel electrodes arranged in a second array such that each of said plurality of pixels is coupled to a respective said thin film transistor in said first array for receiving a signal from said respective thin film transistor; and a third layer comprising a plurality of colour filters arranged in a third array for filtering light displayed by said array of pixels, wherein said third array has the same pattern as said second array, the method comprising:

aligning each said filter with each said respective electrode and connecting each said electrode to said thin film transistor so as to allow relative misalignment of said electrode and said thin film transistor.

22. A pixel for a flexible display, comprising:

a first layer comprising a plurality of thin film transistors arranged in a first array on a flexible substrate; and

a second layer disposed above said first layer comprising a plurality of pixel electrodes arranged in a second array such that each of said plurality of pixel electrodes is coupled to a respective thin film transistor in said first array for receiving a signal from said respective thin film transistor,

wherein each of said pixel electrodes is shaped to enable each pixel electrode to be displaced laterally with respect to said respective thin film transistor during manufacture of said pixel, said displacement being caused by distortions in said flexible substrate.

23. A pixel according to claim 22 , wherein said coupling between each of said electrodes and said respective thin film transistor comprises a via connector between each of said pixel electrodes and said respective thin film transistor.

24. A pixel according to claim 23 , wherein a maximum lateral displacement between each of said electrodes and said respective thin film transistor is less than half of a difference between a dimension of said electrode and a diameter of said via connector.

25. A pixel according to claim 22 , further comprising:

a third layer comprising a plurality of colour filters arranged in a third array for filtering light displayed by said array of pixels,

wherein said third array has the same pattern as said second array whereby said third layer is aligned to said second layer such that each said colour filter is substantially aligned to each said pixel electrode, thereby compensating

for distortions in said first array caused by distortions in said flexible substrate.

26. A pixel according to claim 22 , further comprising:

a display medium disposed between said second and third layers, said display medium being responsive to signals on said pixel electrode.

27. A pixel according to claim 26 wherein said display medium comprises an electrophoretic display medium.

28. A pixel according to claim 26 , wherein said display medium comprises a liquid crystal medium.

29. A pixel according to claim 22 , wherein said substrate comprises polyethyleneterephtalate (PET) or polyethylenenaphtalene (PEN).

30. A pixel according to claim 22 , wherein said thin film transistor comprises an organic semiconductor.

31. A pixel according to claim 30 , wherein said organic semiconductor is a solution-processed organic semiconductor.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2023
From: FLEXENABLE LIMITED
To: FLEXENABLE TECHNOLOGY LIMITED
Reel/Frame 065281/0934 →
CHANGE OF NAME Recorded Jul 23, 2015
From: PLASTIC LOGIC LIMITED
To: FLEXENABLE LIMITED
Reel/Frame 036176/0105 →
RELEASE OF SECURITY INTEREST Recorded May 12, 2011
From: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
To: PLASTIC LOGIC LIMITED
Reel/Frame 026271/0377 →
SECURITY AGREEMENT Recorded Aug 3, 2010
From: PLASTIC LOGIC LIMITED
To: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
Reel/Frame 024776/0357 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2010
From: VON WERNE, TIM
To: PLASTIC LOGIC LIMITED
Reel/Frame 023763/0156 →