IP Library Granted Patent US 7,944,383
Granted Patent B2
US 7,944,383 · App. 12/519,284 · Granted May 17, 2011

Data processing device comprising ADC unit

Assignee: NXP B.V.
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Quick Facts
Patent No.
US 7,944,383
App. No.
12/519,284
Granted
May 17, 2011
Kind
B2
Abstract

A device ( 100 ) for processing data, the device ( 100 ) comprising a plurality of signal paths ( 130, 140, 150 ) each receiving an identical analog input signal ( 104 ), at least one signal conditioning unit ( 101 to 103 ) in at least one of the plurality of signal paths ( 130, 140, 150 ), wherein each signal conditioning unit ( 101 to 103 ) is adapted for generating a respective analog intermediate signal ( 105 to 107 ) by manipulating a property, particularly an amplitude, of the analog input signal ( 104 ), and a plurality of analog to digital converting units ( 108 to 110 ) each of which being assigned to a corresponding one of the plurality of signal paths ( 130, 140, 150 ) and being supplied with the analog input signal ( 104 ) or a respective analog intermediate signal ( 105 to 107 ), wherein each of the plurality of analog to digital converting units ( 108 to 110 ) is adapted for generating a respective digital intermediate signal ( 111 to 113 ) based on the respective analog intermediate signal ( 105 to 107 ) or based on the analog input signal ( 104 ); a digital signal processing unit ( 114 ) supplied with the plurality of digital intermediate signals ( 111 to 113 ) and adapted for generating a digital output signal ( 115 ) by processing the digital intermediate signals ( 111 to 113 ).

Claims (30)

1. A device for processing data, the device comprising

a signal conditioning block adapted for manipulating a property of an analog input signal;

a plurality of analog to digital converting units each adapted for generating a respective digital intermediate signal based on an output of the signal conditioning block;

a digital signal processing unit supplied with the plurality of digital intermediate signals, wherein the digital signal processing unit is adapted for generating a digital output signal by processing the digital intermediate signals; and

a plurality of signal paths each receiving the identical analog input signal;

wherein the signal conditioning block comprises at least one signal conditioning unit in at least one of the plurality of signal paths, wherein each signal conditioning unit is adapted for generating a respective analog intermediate signal by manipulating the property, particularly an amplitude, of the analog input signal;

wherein each of the plurality of analog to digital converting units is assigned to a corresponding one of the plurality of signal paths and is supplied with the analog input signal or a respective analog intermediate signal, wherein each of the plurality of analog to digital converting units is adapted for generating a respective digital intermediate signal based on the respective analog intermediate signal or based on the analog input signal;

wherein the at least one signal conditioning unit is adapted for selectively amplifying or attenuating or integrating the analog input signal when generating the respective analog intermediate signal to thereby adjust a portion of the respective analog intermediate signal being processible by the assigned one of the plurality of analog to digital converting units in view of a characteristic, particularly in view of a value of a full scale range, of the assigned one of the plurality of analog to digital converting units.

2. The device of claim 1 , wherein the digital signal processing unit is adapted for detecting clipping of any one of the digital intermediate signals of any one of the plurality of analog to digital converting units and is adapted for generating the digital output signal under consideration of a detected clipping.

3. The device of claim 2 , wherein the digital signal processing unit is adapted for substituting a clipping portion of any one of the digital intermediate signals by a non-clipping portion of any other one of the digital intermediate signals.

4. A device for processing data, the device comprising

a signal conditioning block adapted for manipulating a property of an analog input signal;

a plurality of analog to digital converting units each adapted for generating a respective digital intermediate signal based on an output of the signal conditioning block;

a digital signal processing unit supplied with the plurality of digital intermediate signals, wherein the digital signal processing unit is adapted for generating a digital output signal by processing the digital intermediate signals;

a plurality of signal paths each receiving the identical analog input signal;

wherein the signal conditioning block comprises at least one signal conditioning unit in at least one of the plurality of signal paths, wherein each signal conditioning unit is adapted for generating a respective analog intermediate signal by manipulating the property, particularly an amplitude, of the analog input signal;

wherein each of the plurality of analog to digital converting units is assigned to a corresponding one of the plurality of signal paths and is supplied with the analog input signal or a respective analog intermediate signal, wherein each of the plurality of analog to digital converting units is adapted for generating a respective digital intermediate signal based on the respective analog intermediate signal or based on the analog input signal;

wherein a first one of the at least one signal conditioning unit comprises a first amplifier having a gain factor of one, and wherein a second one of the at least one signal conditioning unit comprises a second amplifier having a gain factor of less than one;

wherein the digital signal processing unit is adapted for detecting clipping of the digital intermediate signal provided by the analog to digital converting unit coupled to the first amplifier and is adapted to replace a clipping sample of the analog to digital converting unit coupled to the first amplifier by a non-clipping sample of the analog to digital converting unit coupled to the second amplifier.

5. The device of claim 4 , wherein a value of a full scale range of the analog to digital converting unit coupled to the first amplifier is smaller than a value of a full scale range of the analog to digital converting unit coupled to the second amplifier.

6. The device of claim 4 , wherein a resolution of the analog to digital converting unit coupled to the first amplifier is larger than a resolution of the analog to digital converting unit coupled to the second amplifier.

7. A device for processing data, the device comprising

a signal conditioning block adapted for manipulating a property of an analog input signal;

a plurality of analog to digital converting units each adapted for generating a respective digital intermediate signal based on an output of the signal conditioning block;

a digital signal processing unit supplied with the plurality of digital intermediate signals, wherein the digital signal processing unit is adapted for generating a digital output signal by processing the digital intermediate signal;

a plurality of signal paths each receiving the identical analog input signal;

wherein the signal conditioning block comprises at least one signal conditioning unit in at least one of the plurality of signal paths, wherein each signal conditioning unit is adapted for generating a respective analog intermediate signal by manipulating the property, particularly an amplitude, of the analog input signal;

wherein each of the plurality of analog to digital converting units is assigned to a corresponding one of the plurality of signal paths and is supplied with the analog input signal or a respective analog intermediate signal, wherein each of the plurality of analog to digital converting units is adapted for generating a respective digital intermediate signal based on the respective analog intermediate signal or based on the analog input signal;

wherein a third one of the at least one signal conditioning unit comprises a fourth amplifier having a gain factor of one;

wherein a value of a full scale range of the analog to digital converting unit coupled to the first amplifier is smaller than a value of a full scale range of the analog to digital converting unit coupled to the forth amplifier.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2009
From: DORIS, KONSTANTINOS
To: NXP, B.V.
Reel/Frame 022826/0513 →
Priority Claims (1)
EP 06025938 · Dec 14, 2006 · regional
Continuity (1)
Related Publication 20100085231A1 · Apr 8, 2010