IP Library Granted Patent US 9,142,720
Granted Patent B2
US 9,142,720 · App. 12/525,066 · Granted Sep 22, 2015

Thin-film light emitting diode chip and method for producing a thin-film light emitting diode chip

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Quick Facts
Patent No.
US 9,142,720
App. No.
12/525,066
Granted
Sep 22, 2015
Kind
B2
Abstract

A thin-film light-emitting diode chip with a layer stack having a first emission surface and an opposite second emission surface, so that the thin-film light-emitting diode chip has at least two main emission directions. Measures for improving the outcoupling of the light generated in the layer sequence are provided on both the first and the second main emission surface. A method is disclosed for manufacturing a thin-film light-emitting diode chip.

Claims (37)

1. A thin-film light-emitting diode chip comprising a layer sequence having a first main emission surface and an opposite second main emission surface, so that the thin-film light-emitting diode chip has at least two opposite main emission directions, the thin-film light-emitting diode chip emitting light through the first main emission surface and through the opposite second main emission surface in said two opposite main emission directions, wherein measures for improving the outcoupling of the light generated in the layer sequence, in both of the main emission directions, are provided on both the first and the second main emission surfaces, wherein the thin-film light-emitting diode chip does not include a substrate, and wherein the first and second main emission surfaces each have an exposed portion facing in a direction away from the layer sequence so as to emit light away from the layer sequence,

wherein contact areas are provided on at least one of the main emission surfaces for connecting the thin-film light-emitting diode chip, and

wherein a mirror coating is provided on the side of contact areas facing the layer sequence.

2. The thin-film light-emitting diode chip according to claim 1 , wherein the main emission surfaces of the layer sequence are at least partially roughened to improve the outcoupling of the light generated in the layer sequence.

3. The thin-film light-emitting diode chip according to claim 2 , wherein a roughened section is produced in a wet-chemical or dry-chemical process.

4. The thin-film light-emitting diode chip according to claim 1 , wherein outcoupling prisms are formed on the main emission surfaces to improve the outcoupling of the light generated in the layer sequence.

5. The thin-film light-emitting diode chip according to claim 1 , wherein the contact areas are strip-shaped, for distributing current to various areas of the layer sequence.

6. The thin-film light-emitting diode chip according to claim 5 , wherein the strip-shaped contact areas are frame-shaped.

7. The thin-film light-emitting diode chip according to claim 1 , wherein the thickness of the layer sequence lies between 5 μm and 15 μm.

8. The thin-film light-emitting diode chip according to claim 1 , wherein the layer sequence has adjacent layers of an n-doped InGaN and a p-doped InGaN.

9. An arrangement comprising a thin-film light-emitting diode chip according to claim 1 and transparent carrier films, each bearing contact traces, wherein the contact traces are each connected to the contact areas of the thin-film light-emitting diode chip.

10. The thin-film light-emitting diode chip according to claim 1 , wherein the emission in the two main emission directions is symmetrical.

11. A thin-film light-emitting diode chip comprising a layer sequence having a first main emission surface and an opposite second main emission surface, so that the thin-film light-emitting diode chip has at least two opposite main emission directions, the thin-film light-emitting diode chip emitting light through the first main emission surface and through the opposite second main emission surface in said two opposite main emission directions, wherein measures for improving the outcoupling of the light generated in the layer sequence, in both of the main emission directions, are provided on both the first and the second main emission surfaces, wherein the thin-film light-emitting diode chip does not include a substrate, and wherein the first and second main emission surfaces each have an exposed portion facing in a direction away from the layer sequence so as to emit light away from the layer sequence,

wherein the main emission surfaces of the layer sequence are at least partially roughened to improve the outcoupling of the light generated in the layer sequence, and

wherein the structure size of the roughened sections is about 350 nm.

12. An arrangement comprising:

a thin-film light-emitting diode chip having a layer sequence having a first main emission surface and an opposite second main emission surface, so that the thin-film light-emitting diode chip has at least two opposite main emission directions, the thin-film light-emitting diode chip emitting light through the first main emission surface and through the opposite second main emission surface in said two opposite main emission directions, wherein measures for improving the outcoupling of the light generated in the layer sequence, in both of the main emission directions, are provided on both the first and the second main emission surfaces, wherein the thin-film light-emitting diode chip does not include a substrate, and wherein the first and second main emission surfaces each have an exposed portion facing in a direction away from the layer sequence so as to emit light away from the layer sequence; and

transparent carrier films, each bearing contact traces, wherein the contact traces are each connected to the contact areas of the thin-film light-emitting diode chip,

wherein the contact traces are made of indium-tin oxide.

13. A method for manufacturing a thin-film light-emitting diode chip comprising the steps of:

forming a layer sequence suitable for emitting light through a first main emission surface and through an opposite second main emission surface in two opposite main emission directions from a semiconductor material on a growth substrate;

forming an electrically conductive first contact material layer on a first side of the layer sequence;

structuring the first contact material layer to form a contact area;

connecting the structured first contact material layer to a carrier;

removing the growth substrate;

forming an electrically conductive second contact material layer on a second side of the layer sequence on the opposite side from the first side of the layer sequence;

structuring the second contact material layer to form a contact area; and

separating the first contact material layer from the carrier,

wherein measures for improving the outcoupling of the light generated in the layer sequence, in both of the main emission directions, are provided on both the first and the second sides of the layer sequence,

wherein, after the removing of the growth substrate, the thin-film light-emitting diode chip does not include a substrate,

wherein the first and second main emission surfaces each are provided with an exposed portion facing in a direction away from the layer sequence so as to emit light away from the layer sequence, and

wherein the contact material layers are applied in such a manner that the sides facing the layer sequence are mirror-coated.

14. The method according to claim 13 , wherein areas of the active layer sequence that are free of the first contact material layer are roughened on their surface.

15. The method of claim 14 , wherein areas of the active layer sequence that are free of the first contact material layer are roughened on their surface by a wet-chemical process.

16. The method according to claim 13 , wherein areas of the layer sequence that are free of the second contact material layer are roughened on their surface.

17. The method of claim 16 , wherein areas of the active layer sequence that are free of the second contact material layer are roughened on their surface by a wet-chemical process.

18. The method according to claim 13 , wherein during or after the structuring of the first and/or second contact material layer, outcoupling prisms are formed on the surface of the layer sequence.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2009
From: HERRMANN, SIEGFRIED
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 023596/0765 →