IP Library Granted Patent US 7,890,077
Granted Patent B2
US 7,890,077 · App. 12/533,416 · Granted Feb 15, 2011

Balanced mixer with calibration of load impedances

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Quick Facts
Patent No.
US 7,890,077
App. No.
12/533,416
Granted
Feb 15, 2011
Kind
B2
Abstract

A calibration device is coupled to a balanced circuit device including first and second outputs provided with first and second load impedances. The calibration device includes an adjusting circuit to adjust the first and second load impedances into a load imbalance for linearization. A coupling circuit is inserted between the adjusting circuit and the first and second outputs to selectively couple the adjusting circuit to one of the first and second outputs, so that the adjusting circuit is coupled in parallel either to the first load impedance or to the second load impedance.

Claims (17)

1. A calibration device for a balanced circuit device comprising first and second outputs respectively provided with first and second load impedances, said calibration device comprising an adjusting circuit to adjust said first and second load impedances into a load imbalance for the purpose of linearization, comprising a coupling circuit between said adjusting circuit and said first and second outputs to selectively couple said adjusting circuit to only a chosen one of said first and second outputs, so that said adjusting circuit is coupled in parallel either to said first load impedance or to said second load impedance.

2. The calibration device according to claim 1 , wherein said coupling circuit comprises at least a first switching circuit between said adjusting circuit and said first output and a second switching circuit between said adjusting circuit and said second output, said first and second switching circuits coupling said adjusting circuit to only one of said first and second outputs at the same time.

3. The calibration device according to claim 2 , wherein said coupling circuit further comprises a third switching circuit comprising a first terminal coupled to said first output upstream of said first switching circuit and a fourth switching circuit comprising a first terminal coupled to said second output upstream of said second switching circuit, said third switching circuit being in an “off” state when said first switching circuit is in an “on” state, and said fourth switching circuit being in an “off” state when said second switching circuit is in an “on” state, whereby each of said first and second outputs is always coupled to one switching circuit in its “on” state and one switching circuit in its “off” state.

4. The calibration device according to claim 3 , wherein said third and fourth switching circuits comprise dummy switching circuits each comprising a second terminal, said second terminals being coupled to each other.

5. The calibration device according to claim 3 , wherein said states of said first, second, third and fourth switching circuits are controlled by the same command signal.

6. The calibration device according to claim 1 , wherein said adjusting circuit comprises at least one adjusting element comprising a control switch coupled in series to an auxiliary load impedance.

7. The calibration device according to claim 6 , wherein said adjusting circuit comprises at least two adjusting elements coupled in parallel, each of said adjusting elements being selectable through command signals to adjust said first or second load impedances to a chosen load imbalance.

8. The calibration device according to claim 6 , wherein each auxiliary load impedance comprises one terminal coupled to said first and second switching circuits.

9. The calibration device according to claim 6 , wherein each of said auxiliary load impedances differs from one adjusting element to another.

10. A balanced circuit device comprising a calibration device comprising first and second outputs respectively provided with first and second load impedances, said calibration device comprising an adjusting circuit to adjust said first and second load impedances into a load imbalance for the purpose of linearization, comprising a coupling circuit between said adjusting circuit and said first and second outputs to selectively couple said adjusting circuit to only a chosen one of said first and second outputs, so that said adjusting circuit is coupled in parallel either to said first load impedance or to said second load impedance.

11. The balanced circuit device according to claim 10 , further comprising a mixer circuit, a modulator circuit and a demodulator circuit.

12. The balanced circuit device according to claim 11 , wherein the balanced circuit device comprises a Gilbert-cell multiplier.

13. A receiver and/or transmitter device, comprising a balanced circuit device comprising a calibration device comprising first and second outputs respectively provided with first and second load impedances, said calibration device comprising an adjusting circuit to adjust said first and second load impedances into a load imbalance for the purpose of linearization, comprising a coupling circuit between said adjusting circuit and said first and second outputs to selectively couple said adjusting circuit to only a chosen one of said first and second outputs, so that said adjusting circuit is coupled in parallel either to said first load impedance or to said second load impedance.

14. The receiver and/or transmitter device according to claim 13 , comprising a direct conversion receiver circuit.

15. The receiver and/or transmitter device according to claim 13 , comprising a low-intermediate frequency conversion receiver circuit.

16. An integrated circuit, comprising a balanced circuit device comprising a calibration device comprising first and second outputs respectively provided with first and second load impedances, said calibration device comprising an adjusting circuit to adjust said first and second load impedances into a load imbalance for the purpose of linearization, comprising a coupling circuit between said adjusting circuit and said first and second outputs to selectively couple said adjusting circuit to only a chosen one of said first and second outputs, so that said adjusting circuit is coupled in parallel either to said first load impedance or to said second load impedance.

17. The integrated circuit of claim 16 , further comprising a receiver and/or transmitter circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: ST-ERICSSON SA
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 033753/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2009
From: BARRE, PHILIPPE
To: ST-ERICSSON SA
Reel/Frame 023215/0287 →