IP Library Granted Patent US 8,627,510
Granted Patent B2
US 8,627,510 · App. 12/534,225 · Granted Jan 7, 2014

Electronic device and method for operating the electronic device

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Quick Facts
Patent No.
US 8,627,510
App. No.
12/534,225
Granted
Jan 7, 2014
Kind
B2
Abstract

The invention describes an electronic device and a method for operating the electronic device. The electronic device includes one or more circuit components. The electronic device further includes one or more fuses and one or more non-volatile memories to disable the access of at least one of the one or more circuit components. Each of the one or more non-volatile memories includes one or more firmware, which are used to program at least one bit to manage the access of the at least one circuit component. The method includes performing a power-up sequence in a power cycle for the electronic device. The method further includes determining a state of circuit and a state of a bit for selectively enabling a test function.

Claims (33)

1. A method of operating an electronic device, comprising:

performing a power-up sequence in each power cycle for the electronic device;

determining, during the power-up sequence, a state of a circuit component in the electronic device and selectively enabling a function based upon the determined state of the circuit component;

selectively programming, during the power-up sequence of each power cycle for the electronics device, a write-once bit in the electronics device, the write-once bit being programmable only once during each power cycle; and

determining, during the power-up sequence of each power cycle for the electronics device, a state of the write-once bit in the electronic device and selectively enabling the function based upon the determined state of the bit.

2. The method of claim 1 , wherein determining the state of the circuit component comprises determining whether a fuse in the circuit is blown and wherein the function is enabled if the fuse is not blown.

3. The method of claim 1 , wherein the function comprises a test function including a test port, and selectively enabling the function comprises selectively enabling the test port.

4. The method of claim 3 , wherein the test port is a Joint Test Action Group (JTAG) port.

5. The method of claim 1 , further comprising confirming that firmware received by the electronic device is an authorized firmware, and selectively disabling the function unless enabled by the authorized firmware.

6. The method of claim 1 , wherein determining the state of the write-once bit comprises determining whether the bit had changed state from an initial predetermined state, and wherein the function is enabled upon an affirmative determination that the state of the bit had changed from the initial predetermined state.

7. An electronic device comprising:

a first circuit having at least one programmed component for disabling access to a second circuit;

at least one write-once bit, the at least one write-once bit being programmable only once during each power cycle of the electronics device; and

one or more non-volatile memories, each of the one or more non-volatile memories comprising firmware to selectively program the at least one write-once bit during a power up sequence of each power cycle of the electronic device to manage access to the second circuit during each power cycle.

8. The electronic device of claim 7 , wherein the at least one programmed component comprises one or more fuses which when blown disables access to the second circuit based upon a state of the at least one write-once bit.

9. The electronic device of claim 7 , wherein the firmware programs the at least one write-once bit to enable access to the second circuit during the power-up sequence in each power cycle.

10. The electronic device of claim 7 , wherein the at least one write-once bit is programmed during the power-up sequence of each power cycle to disable access to the second circuit during each power cycle.

11. The electronic device of claim 7 , wherein the second circuit comprises a test port.

12. The electronic device of claim 11 , wherein the test port is a Joint Test Action Group (JTAG) port.

13. The electronic device of claim 7 , wherein the firmware is an authorized firmware.

14. The electronic device of claim 7 , wherein the firmware programs the at least one write-once bit during the power-up sequence of each power cycle of the electronics device, the programmed state of the at least one write-once bit disabling access to the second circuit during each power cycle.

15. The electronics device of claim 7 , wherein the firmware does not program the at least one write-once bit during the power-up sequence of each power cycle of the electronics device, and an initial, unprogrammed state of the at least one write-once bit disables access to the second circuit during each power cycle.

16. A computer program product for use with a processor for operating an electronic device, the computer program product comprising a non-transitory computer usable medium having a computer readable program code embodied therein which, when executed by the processor, causes the computer readable program code to perform:

performing a power-up sequence in each power cycle for the electronic device;

determining, during the power-up sequence, a state of a circuit in the electronic device and selectively enabling a function based upon the determined state of the circuit;

selectively programming a write-once bit in the electronic device in the power-up sequence of each power cycle of the electronic device, wherein the write-once bit is programmable only one time during each power cycle of the electronics device; and

determining, during each power-up sequence, a state of a write-once bit in the electronic device and selectively enabling the function based upon the determined state of the bit.

17. The computer program product of claim 16 , wherein determining the state of the circuit comprises determining whether a fuse in the circuit is blown and wherein the function is enabled if the fuse is not blown.

18. The computer program product of claim 16 , wherein the function includes a test port, and wherein selectively enabling the function comprises selectively enabling the test port.

19. The computer program product of claim 16 , wherein the computer readable program code further performs confirming that firmware received by the electronic device is authorized firmware, and selectively disabling the function based in part upon the confirmation.

20. The computer program product of claim 16 , wherein determining the state of the bit comprises determining whether the bit had changed state from an initial predetermined state, and wherein the function is enabled upon an affirmative determination that the state of the bit had changed from the initial predetermined state.

21. The computer program product of claim 16 , wherein the selectively programming comprises programming the at least one write-once bit during the power-up sequence of each power cycle of the electronics device.

22. The computer program product of claim 16 , wherein determining the state of the write-once bit is performed following selectively programming the write-once bit.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jan 18, 2024
From: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 066345/0026 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT U.S. PATENT NUMBER PREVIOUSLY RECORDED AT REEL: 046989 FRAME: 0396. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Oct 24, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 047760/0795 →
PATENT SECURITY AGREEMENT Recorded Aug 30, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 046989/0396 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2009
From: CASE, CHRISTOPHER WILSON
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 023040/0886 →