Wafer-level flip chip package with RF passive element/ package signal connection overlay
View Patent ↗A packaged integrated circuit includes an integrated circuit having a Radio Frequency (RF) passive element formed therein and a wafer level chip scale flip chip package that contains the integrated circuit. The wafer level chip scale flip chip package includes at least one dielectric layer isolating a top metal layer of the integrated circuit and a package signal connection upon the at least one dielectric layer, wherein the package signal connection partially overlays the RF passive element with respect to a surface of the integrated circuit. The RF passive element may be an inductor, a transformer, a capacitor, or another passive element. The package signal connection may be a conductive ball, a conductive bump, a conductive pad, or a conductive spring, for example. A conductive structure may reside upon the at least one dielectric layer to provide shielding to the RF passive element and may include a plurality of conductive elements or a mesh.
1. A packaged integrated circuit comprising:
an integrated circuit having a Radio Frequency (RF) passive element formed therein; and
a wafer level chip scale flip chip package that contains the integrated circuit and that comprises:
at least one dielectric layer isolating a top metal layer of the integrated circuit;
a package signal connection upon the at least one dielectric layer, wherein the package signal connection partially overlaps the RF passive element with respect to a surface of the integrated circuit, and wherein the amount of overlap is limited to a predetermined percentage overlay limit; and
a redistribution layer electrically coupled to the package signal connection and the top metal layer.
2. The packaged integrated circuit of claim 1 , wherein the RF passive element comprises an inductor.
3. The packaged integrated circuit of claim 1 , wherein the RF passive element comprises a transformer.
4. The packaged integrated circuit of claim 1 , wherein the RF passive element comprises a capacitor.
5. The packaged integrated circuit of claim 1 , wherein the package signal connection comprises a conductive ball.
6. The packaged integrated circuit of claim 1 , wherein the package signal connection comprises a conductive bump.
7. The packaged integrated circuit of claim 1 , wherein the package signal connection comprises a conductive spring.
8. The packaged integrated circuit of claim 1 , further comprising a conductive structure residing upon the at least one dielectric layer.
9. The packaged integrated circuit claim 8 , wherein the conductive structure comprises a plurality of conductive elements.
10. A wireless device comprising:
a housing;
an antenna;
a user interface; and
a packaged integrated circuit contained in the housing and coupled to at least one of the antenna and the user interface, the packaged integrated circuit comprising:
an integrated circuit having a Radio Frequency (RF) passive element formed therein; and
a wafer level chip scale flip chip package that contains the integrated circuit and that comprises:
at least one dielectric layer isolating a top metal layer of the integrated circuit;
a package signal connection upon the at least one dielectric layer, wherein the package signal connection partially overlaps the RF passive element with respect to a surface of the integrated circuit, and wherein the amount of overlap is limited to a predetermined percentage overlay limit; and
a redistribution layer electrically coupled to the package signal connection and the top metal layer.
11. The wireless device of claim 10 , wherein the RF passive element comprises an inductor.
12. The wireless device of claim 10 , wherein the RF passive element comprises a transformer.
13. The wireless device of claim 10 , wherein the RF passive element comprises a capacitor.
14. The wireless device of claim 10 , wherein the package signal connection comprises a conductive ball.
15. The wireless device of claim 10 , wherein the package signal connection comprises a conductive bump.
16. The wireless device of claim 10 , wherein the package signal connection comprises a conductive spring.
17. The wireless device of claim 10 , further comprising a conductive structure residing upon the at least one dielectric layer.
18. The wireless device of claim 17 , wherein the conductive structure comprises a plurality of conductive elements.
19. The wireless device of claim 10 , further comprising an under bump metallization (UBM) layer.
20. A packaged integrated circuit comprising:
an integrated circuit having a Radio Frequency (RF) passive element formed therein; and
a wafer level chip scale flip chip package that contains the integrated circuit and that comprises:
at least one dielectric layer isolating a top metal layer of the integrated circuit;
a package signal connection upon the at least one dielectric layer, wherein the package signal connection partially overlaps the RF passive element with respect to a surface of the integrated circuit, and wherein the amount of overlap is limited to a specified maximum overlay amount;
a redistribution layer electrically coupled to the package signal connection and the top metal layer; and
an under bump metallization (UBM) layer.