Solid-state imaging device driving method
View Patent ↗Photosensitive cells each includes a photodiode ( 1 ), a transfer gate ( 2 ), a floating diffusion layer portion ( 3 ), an amplifying transistor ( 4 ), and a reset transistor ( 5 ). Drains of the amplifying transistors ( 4 ) of the photosensitive cells are connected to a power supply line ( 10 ), and a pulsed power supply voltage (VddC) is applied to the power supply line ( 10 ). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors ( 5 ), or channel potentials obtained when a low level is applied to the transfer gates ( 2 ), or channel potentials of the photodiodes ( 1 ), a reproduced image with low noise is read.
1. A solid-state imaging device, comprising:
a photosensitive region having a plurality of photosensitive cells which are two-dimensionally arranged, each photosensitive cell including a photoelectrical conversion element for generating a signal charge corresponding to an intensity of incident light, a transfer transistor for reading the signal charge in the photoelectrical conversion element and transferring the read signal charge to a floating diffusion layer section, an amplifier transistor for outputting an electrical signal corresponding to changes in potential of the floating diffusion layer section, and a reset transistor for resetting the potential of the floating diffusion layer section to a predetermined initial value; and
a line for supplying a selected voltage to the drain of the reset transistor of each photosensitive cell,
wherein:
the line supplies, as the selected voltage, a first voltage and a second voltage which is lower than the first voltage,
a potential of the second voltage is higher than zero potential,
a potential of a channel, which is formed beneath a gate of the reset transistor of a given one of the photosensitive cells when a low level voltage is applied to the gate of the reset transistor, is lower than the second voltage, and
one or more signal lines are shared by the photosensitive cells which are adjacent in a vertical scanning direction.
2. The solid-state imaging device according to claim 1 , wherein:
a drain voltage of the reset transistor of a given one of the photosensitive cells is controlled via the line.
3. The solid-state imaging device according to claim 1 , further comprising:
a plurality of vertical signal lines, each of which is connected to at least one amplifier transistor;
a noise suppression circuit for suppressing noise in signals outputted to the vertical signal lines; and
a horizontal shift register to which an output of the noise suppression circuit is inputted, wherein
the noise suppression circuit operates within a time period during which the first voltage is applied and during which the horizontal shift register is not driven.
4. A solid-state imaging device, comprising:
a photosensitive region having a plurality of photosensitive cells which are two-dimensionally arranged, each photosensitive cell including a photoelectrical conversion element for generating signal charge corresponding to an intensity of incident light, a transfer transistor for reading the signal charge in the photoelectrical conversion element and transferring the read signal charge to a floating diffusion layer section, an amplifier transistor for outputting an electrical signal corresponding to changes in potential of the floating diffusion layer section, and a reset transistor for resetting the potential of the floating diffusion layer section to a predetermined initial value; and
a line for supplying a selected voltage to the drain of the reset transistor of each photosensitive cell,
wherein:
the line supplies, as the selected voltage, a first voltage and a second voltage which is lower than the first voltage,
a potential of the second voltage is higher than zero potential,
a potential of a channel, which is formed beneath a gate of the reset transistor when a low level voltage is applied to the gate of the reset transistor, is lower than the second voltage, and
one or more signal lines are shared by the photosensitive cells which are adjacent in a horizontal scanning direction.
5. The solid-state imaging device according to claim 4 , wherein:
the one or more signal lines are wirings for controlling the gates of the transfer transistors.
6. The solid-state imaging device according to claim 4 , wherein:
the one or more signal lines are wirings for controlling the gates of the reset transistors.
7. The solid-state imaging device according to claim 4 , further comprising:
a plurality of vertical signal lines, each of which is connected to at least one amplifier transistor;
a noise suppression circuit for suppressing noise in signals outputted to the vertical signal lines; and
a horizontal shift register which receives an output of the noise suppression circuit as an input, wherein:
the noise suppression circuit operates within a time period during which the first voltage is applied and during which the horizontal shift register is not driven.
8. The solid-state imaging device comprising:
a photosensitive region having a plurality of photosensitive cells which are two-dimensionally arranged, each photosensitive cell including a photoelectrical conversion element for generating signal charge corresponding to an intensity of incident light, a transfer transistor for reading the signal charge in the photoelectrical conversion element and transferring the read signal charge to a floating diffusion layer section, an amplifier transistor for outputting an electrical signal corresponding to changes in potential of the floating diffusion layer section, and a reset transistor for resetting the potential of the floating diffusion layer section to a predetermined initial value; and
a line for supplying a selected voltage to the drain of the reset transistor of each photosensitive cell,
wherein:
the line supplies, as the selected voltage, a first voltage and a second voltage which is lower than the first voltage,
a potential of the second voltage is higher than zero potential,
a potential of a channel, which is formed beneath a gate of the reset transistor of a given one of the photosensitive cells when a low level voltage is applied to the gate of the reset transistor of said given one of the photosensitive cells, is lower than the second voltage, and
one or more signal lines are shared by the photosensitive cells which are adjacent both in a vertical scanning direction and in a horizontal scanning direction.
9. The solid-state imaging device according to claim 8 , wherein:
an drain voltage of the reset transistor of a given one of the photosensitive cell is controlled via the line.
10. The solid-state imaging device according to claim 8 , wherein:
a plurality of vertical signal lines, each of which is connected to at least one amplifier transistor;
a noise suppression circuit for suppressing noise in signals outputted to the vertical signal lines; and
a horizontal shift register which receives an output of the noise suppression circuit as an input, wherein:
the noise suppression circuit operates within a time period during which the first voltage is applied and during which the horizontal shift register is not driven.
11. The solid-state imaging device according to claim 1 , wherein:
a potential of a channel, which is formed beneath a gate of the transfer transistor of a given one of the photosensitive cells when a low level voltage is applied to the gate of the transfer transistor of said given one of the photosensitive cells, is lower than the second voltage.
12. The solid-state imaging device according to claim 4 , wherein:
a potential of a channel, which is formed beneath a gate of the transfer transistor of a given one of the photosensitive cells when a low level voltage is applied to the gate of the transfer transistor of said given one of the photosensitive cells, is lower than the second voltage.
13. The solid-state imaging device according to claim 8 , wherein:
a potential of a channel, which is formed beneath a gate of the transfer transistor of a given one of the photosensitive cells when a low level voltage is applied to the gate of the transfer transistor of said given one of the photosensitive cells, is lower than the second voltage.