IP Library Granted Patent US 7,829,414
Granted Patent B2
US 7,829,414 · App. 12/537,652 · Granted Nov 9, 2010

Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device

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Quick Facts
Patent No.
US 7,829,414
App. No.
12/537,652
Granted
Nov 9, 2010
Kind
B2
Abstract

An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A self-aligned polysilicon film is formed on the silicon oxide film between the isolation oxide films. After forming a resist pattern covering the peripheral circuitry, the isolation oxide films in the memory cell are etched by a predetermined thickness. An ONO film is formed on the entire surface of the substrate, a second resist pattern covering the memory cell is formed. Then, the ONO film, the polysilicon film 8 and the silicon oxide film 7 are removed from the peripheral circuitry.

Claims (7)

1. A non-volatile semiconductor memory device having a memory cell and peripheral circuitry adjacent to the memory cell, comprising:

element isolation structures for isolating active regions in a substrate; and

semiconductor elements formed on the active regions,

wherein the active regions of the memory cell include:

a plurality of rectangular first active regions arrayed in the lateral direction; and

second active regions connecting ends of the first active regions to each other, the second active regions surrounding the memory cell, and

wherein an upper surface of the element isolation structure in the peripheral circuitry has a height equivalent to a height of the surface of the substrate, or higher than the height of the surface of the substrate.