IP Library Granted Patent US 8,289,737
Granted Patent B2
US 8,289,737 · App. 12/539,045 · Granted Oct 16, 2012

Bridgeless boost PFC circuits and systems with reduced common mode EMI

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,289,737
App. No.
12/539,045
Granted
Oct 16, 2012
Kind
B2
Abstract

According to one example embodiment, a bridgeless boost power factor correction (PFC) system includes a first input for connection to a first line of an alternating current (AC) source and a second input for connection to a second line of the AC source. The PFC system includes an output for delivering an output of the bridgeless boost PFC system, a first boost choke coupled to the first input and a second boost choke coupled to the second input. A common mode choke is coupled between the first and second input and the first and second boost choke. A first X capacitor is coupled between the first input and the output and a second X capacitor coupled between the second input and the output.

Claims (31)

1. A bridgeless boost power factor correction (PFC) system comprising:

a first input for connection to a first line of an alternating current (AC) source;

a second input for connection to a second line of the AC source;

an output for delivering an output of the bridgeless boost PFC system;

a first boost choke coupled to the first input;

a second boost choke coupled to the second input;

a common mode choke coupled between the first and second inputs and the first and second boost chokes;

a first X capacitor coupled between the first input and the output; and

a second X capacitor coupled between the second input and the output.

2. The bridgeless boost PFC system of claim 1 wherein the first boost choke and the second boost choke are wound on a same magnetic core.

3. The bridgeless boost PFC system of claim 2 , wherein the first boost choke and the second boost choke are wound in opposite directions on the magnetic core.

4. The bridgeless boost PFC system of claim 2 , wherein the magnetic core is low permeability core.

5. The bridgeless boost PFC system of claim 1 , further comprising an EMI filter coupled to the first and second inputs.

6. The bridgeless boost PFC system of claim 5 wherein the EMI filter includes at least one of an additional X capacitor, a Y capacitor, an additional common mode choke and a differential mode choke.

7. The bridgeless boost PFC system of claim 5 , wherein said EMI filter is adapted to permit voltage boosting without disruption in the operation of said system.

8. The bridgeless boost PFC system of claim 1 , wherein said common mode choke comprises a low loss transformer ferrite.

9. The bridgeless boost PFC system of claim 1 , wherein said common mode choke is a high inductance choke.

10. The bridgeless boost PFC system of claim 1 , wherein the capacitance of each of the first and second X capacitors is at least 100 nF.

11. The bridgeless boost PFC system of claim 1 , wherein a number of turns on said common mode choke has no direct relationship to a number of turns on the first and second boost chokes.

12. The bridgeless boost PFC system of claim 1 , wherein an additional X capacitor is coupled across said common mode choke to bypass its leakage inductance.

13. The bridgeless boost PFC system of claim 1 , further comprising a Y capacitor coupled to ground.

14. The bridgeless boost PFC system of claim 1 , further comprising at least one switch and a PWM controller for controlling the switch, wherein said PWM controller is adapted to receive signals from an AC input polarity sensing circuit for an ‘always ON’ or ‘always OFF’ switching methodology.

15. A method for power factor correction in an AC power current

carrying system, said method comprising:

receiving and storing energy from an AC power supply in a first boost choke and a second boost choke;

presenting a relatively high input impedance to the boost chokes;

rectifying the incoming AC power using a combination of a pair of rectifier diodes and semiconductor switches;

controlling a duty cycle of the semiconductor switches; and

bypassing an input line of the AC power supply to an output terminal with a relatively low impedance so that a small high frequency potential difference exists between the input line of the AC power supply and said output terminal to reduce common mode conducted electromagnetic interference (EMI).

16. The method of claim 15 , further comprising filtering EMI from the AC power supply.

17. An AC power supply unit including a PFC system of claim 1 .

Assignments (2)
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: ASTEC INTERNATIONAL LIMITED
To: AES GLOBAL HOLDINGS PTE. LTD.
Reel/Frame 070404/0846 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2009
From: WILDASH, KEVIN D.
To: ASTEC INTERNATIONAL LIMITED
Reel/Frame 023149/0409 →