IP Library Granted Patent US 7,952,128
Granted Patent B2
US 7,952,128 · App. 12/545,431 · Granted May 31, 2011

Semiconductor device

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Quick Facts
Patent No.
US 7,952,128
App. No.
12/545,431
Granted
May 31, 2011
Kind
B2
Abstract

Provided is a metal oxide semiconductor (MOS) capacitor, in which trenches ( 3 ) are formed in a charge accumulation region ( 6 ) of a p-type silicon substrate ( 1 ) to reduce a contact area between the p-type silicon substrate ( 1 ) and a lightly doped n-type well region ( 2 ), thereby reducing a leak current from the lightly doped n-type well region ( 2 ) to the p-type silicon substrate ( 1 ).

Claims (19)

1. A semiconductor device having a metal-oxide-semiconductor capacitor, the semiconductor device comprising:

a silicon substrate of a first conductivity type;

a lightly doped well region of a second conductivity type disposed by diffusing impurities into the silicon substrate;

a charge accumulation region disposed in the lightly doped well region of the second conductivity type;

a plurality of trenches disposed in the charge accumulation region;

a heavily doped region of the second conductivity type disposed outside the charge accumulation region, and having a higher impurity concentration than an impurity concentration of the lightly doped well region of the second conductivity type;

an oxide film disposed in the plurality of trenches disposed in the charge accumulation region, and on a surface of the silicon substrate of the first conductivity type;

a polysilicon electrode disposed on the oxide film; and

a substrate-side electrode disposed to make contact with the heavily doped region of the second conductivity type.

2. A semiconductor device having a metal-oxide-semiconductor capacitor, the semiconductor device comprising:

a silicon substrate of a first conductivity type;

a lightly doped well region of a second conductivity type disposed by diffusing impurities into the silicon substrate;

a charge accumulation region disposed in the lightly doped well region of the second conductivity type;

a plurality of trenches disposed in the charge accumulation region;

a heavily doped region of the second conductivity type disposed outside the charge accumulation region, and having a higher impurity concentration than an impurity concentration of the lightly doped well region of the second conductivity type;

a heavily doped charge accumulation region of the second conductivity type disposed in the plurality of trenches disposed in the charge accumulation region, and on a surface of the silicon substrate of the first conductivity type;

an oxide film disposed on the heavily doped charge accumulation region of the second conductivity type;

a polysilicon electrode disposed on the oxide film; and

a substrate-side electrode disposed to make contact with the heavily doped region of the second conductivity type.

Assignments (4)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 037783 FRAME: 0166. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 23, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 037903/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION .
Reel/Frame 037783/0166 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2009
From: KATO, SHINJIRO; OSANAI, JUN
To: SEIKO INSTRUMENTS INC.
Reel/Frame 023131/0377 →