System and method for reduced area tunable capacitors
View Patent ↗Embodiments of a capacitive tuning system implementing a tunable capacitive array are presented herein. The tunable capacitive array includes both scaled coarse capacitors and one or more fine capacitors. The one or more fine capacitors advantageously reduce a differential nonlinearity associated with the scaled coarse capacitors. The use of fine capacitors limits additional area requirements in an integrated circuit implementation, while improving the accuracy of the capacitive tuning system.
1. A capacitive tuning system, comprising:
a tuning module configured to generate a coarse tuning code and a fine tuning code; and
a tunable capacitive array implemented on a semiconductor substrate, the tunable capacitive array comprising:
scaled coarse capacitors configured to provide a coarse capacitance based on the coarse tuning code, wherein each scaled coarse capacitor is a lump capacitor; and
one or more fine capacitors configured to provide a fine capacitance based on the fine tuning code to reduce a differential nonlinearity associated with the scaled coarse capacitors,
wherein a number of the one or more fine capacitors utilized by the tunable capacitive array is determined based on the differential nonlinearity associated with the scaled coarse capacitors.
2. The capacitive tuning system of claim 1 , wherein the coarse capacitance and the fine capacitance are combined in parallel.
3. The capacitive tuning system of claim 1 , wherein the scaled coarse capacitors are binary scaled.
4. The capacitive tuning system of claim 1 , wherein the coarse tuning code comprises N bits configured to provide 2 N different values.
5. The capacitive tuning system of claim 4 , wherein the tunable capacitive array is configured to provide a change in the coarse capacitance for an increase in the coarse tuning code by a value of one.
6. The capacitive tuning system of claim 5 , wherein a capacitance provided by at least one of the one or more fine capacitors is less than or substantially equal to the change in the coarse capacitance for an increase in the coarse tuning code by a value of one.
7. The capacitive tuning system of claim 1 , wherein the tuning module is configured to generate the coarse tuning code based on comparisons of the coarse capacitance to a reference capacitance.
8. The capacitive tuning system of claim 7 , wherein the tuning module is configured to generate the coarse tuning code before generating the fine tuning code.
9. A capacitive tuning system, comprising:
a tuning module configured to generate a coarse tuning code and a fine tuning code; and
a tunable capacitive array implemented on a semiconductor substrate, the tunable capacitive array comprising:
scaled coarse capacitors configured to provide a coarse capacitance based on the coarse tuning code, wherein each scaled coarse capacitor is a lump capacitor; and
one or more fine capacitors configured to provide a fine capacitance based on the fine tuning code to reduce a differential nonlinearity associated with the scaled coarse capacitors,
wherein the fine capacitance is combined in parallel with the coarse capacitance only for odd values of the coarse tuning code.
10. A capacitive tuning system, comprising:
a tuning module configured to generate a coarse tuning code and a fine tuning code; and
a tunable capacitive array implemented on a semiconductor substrate, the tunable capacitive array comprising:
scaled coarse capacitors configured to provide a coarse capacitance based on the coarse tuning code, wherein each scaled coarse capacitor is a lump capacitor; and
one or more fine capacitors configured to provide a fine capacitance based on the fine tuning code to reduce a differential nonlinearity associated with the scaled coarse capacitors,
wherein a number of the one or more fine capacitors included in the tunable capacitive array is determined based on the differential nonlinearity associated with the scaled coarse capacitors,
wherein the tunable capacitive array is configured to provide a change in the coarse capacitance for an increase in the coarse tuning code by a value of one,
wherein a capacitance provided by at least one of the one or more fine capacitors is less than or substantially equal to the change in the coarse capacitance.
11. The capacitive tuning system of claim 10 , wherein the tuning module is configured to generate the coarse tuning code based on comparisons of the coarse capacitance to a reference capacitance.
12. The capacitive tuning system of claim 11 , wherein the tuning module is configured to generate the coarse tuning code before generating the fine tuning code.
13. The capacitive tuning system of claim 10 , wherein the coarse capacitance and the fine capacitance are combined in parallel.
14. The capacitive tuning system of claim 10 , wherein the fine capacitance is combined with the coarse capacitance only for odd values of the coarse tuning code.
15. The capacitive tuning system of claim 10 , wherein the coarse tuning code comprises N bits configured to provide 2 N different values.
16. The capacitive tuning system of claim 10 , wherein the scaled coarse capacitors are binary scaled.
17. The capacitive tuning system of claim 10 , further comprising:
a capacitive measuring module configured to measure a capacitance provided by the tunable capacitive array to provide a measured capacitance.
18. The capacitive tuning system of claim 17 , further comprising:
a comparator configured to compare the measured capacitance to a reference capacitance value to generate a comparison result.
19. The capacitive tuning system of claim 18 , wherein the tuning module is configured to generate the coarse tuning code and the fine tuning code based on the comparison result.