Thin film transistor substrate and method for fabricating the same
View Patent ↗A thin film transistor substrate includes an insulating substrate, a gate electrode formed on the insulating substrate, a first gate insulating film formed on the gate electrode and having an opening for exposing at least part of the gate electrode, a second gate insulating film covering the gate electrode exposed by the opening and having a larger dielectric constant than the first gate insulating film, a source electrode and a drain electrode disposed apart from each other in a central area of the second gate insulating film and defining a channel region there between, and an organic semiconductor layer formed in the channel region. A method for forming the TFT substrate is also provided. Thus, the present invention provides a TFT substrate in which a characteristic of a TFT is improved.
1. A method for fabricating a thin film transistor substrate, comprising:
preparing an insulating substrate;
forming a gate electrode on the insulating substrate;
forming a data wire between the insulating substrate and the gate electrode but not overlapped by the gate electrode;
forming a first gate insulating film, having a low dielectric constant;
forming an opening in the first gate insulating film exposing at least part of the gate electrode;
forming a second gate insulating film having a larger dielectric constant than the first gate insulating film in the opening;
forming a source electrode and a drain electrode disposed apart from each other in a central area of the second gate insulating film to define a channel region there between; and
forming an organic semiconductor layer in the channel region.
2. The method according to claim 1 , further comprising forming an interlayer insulating film, having a contact hole exposing at least part of the data wire, on the data wire and the insulating substrate.
3. The method according to claim 2 , further comprising forming a conductive member in the contact hole when forming the gate electrode.
4. The method according to claim 3 , wherein forming the second gate insulating film includes employing an inkjet method.
5. The method according to claim 3 , further comprising forming a gate pad while forming the conductive member,
forming an additional opening in the first gate insulating film, exposing at least part of the gate pad, and
forming a data pad contacting member connected through the contact hole to the conductive member, and a gate pad contacting member connected through the additional opening to the gate pad, while forming the source and drain electrodes.
6. The method according to claim 1 , wherein forming the organic semiconductor layer includes employing an inkjet method.
7. The method according to claim 1 , further comprising forming a first passivation layer in the channel region and on the organic semiconductor layer.
8. The method according to claim 7 , wherein forming the first passivation layer includes employing an inkjet method.
9. The method according to claim 1 , wherein forming the second gate insulating film includes forming the second gate insulating film with a smaller thickness than a thickness of the first gate insulating film.