Gallium nitride semiconductor device and method for producing the same
View Patent ↗An insulating layer, an undoped first GaN layer and an AlGaN layer are laminated in this order on a surface of a semiconductor substrate. A surface barrier layer formed by a two-dimensional electron gas is provided in an interface between the first GaN layer and the AlGaN layer. A recess (first recess) which reaches the first GaN layer but does not pierce the first GaN layer is formed in a surface layer of the AlGaN layer. A first high withstand voltage transistor and a control circuit are formed integrally on the aforementioned semiconductor substrate. The first high withstand voltage transistor is formed in the first recess and on a surface of the AlGaN layer. The control circuit includes an n-channel MOSFET formed in part of the first recess, and a depression type n-channel MOSFET formed on a surface of the AlGaN layer. In this manner, there are provided a gallium nitride semiconductor device which can be used under a high temperature environment while reduction in total circuit size can be attained, and a method for producing the gallium nitride semiconductor device.
1. A gallium nitride semiconductor device comprising:
a first semiconductor layer containing gallium nitride;
a second semiconductor layer containing gallium nitride and formed on part of a surface of the first semiconductor layer;
a first semiconductor element formed in the first and second semiconductor layers and having a high withstand voltage; and
a second semiconductor element formed in either the first or the second semiconductor layer and having a low withstand voltage,
wherein the first semiconductor layer has an insulating region provided between the first and second semiconductor elements for separating the first and second semiconductor elements from each other,
wherein the first semiconductor element uses the second semiconductor layer as a drift region, and further comprises a second conductivity type first source region formed on a surface layer of the first semiconductor layer where the second semiconductor layer is not formed,
wherein the second semiconductor element further has a high concentration first conductivity type third semiconductor layer formed on a surface of the second semiconductor layer,
wherein the second semiconductor element is formed from a first conductivity type insulated gate field effect transistor and a second conductivity type insulated gate field effect transistor,
wherein the first conductivity type insulated gate field effect transistor has a second source region and a first drain region on a surface of the first semiconductor layer, and
wherein the second conductivity type insulated gate field effect transistor uses the third semiconductor layer as a third source region and a second drain region.
2. The gallium nitride semiconductor device according to claim 1 ,
wherein the first semiconductor layer is of the first conductivity type,
wherein the second semiconductor layer is of the second conductivity type, and
wherein the gallium nitride semiconductor device further comprises a first gate insulating film formed to cover a range of from part of a surface of the first source region to the second semiconductor layer; and a first gate electrode provided on a surface of the first gate insulating film.
3. A method of producing the gallium nitride semiconductor device according to claim 1 , comprising the steps of:
epitaxially growing the second conductivity type second semiconductor layer containing gallium nitride on a surface of the first conductivity type first semiconductor layer containing gallium nitride;
removing part of the second semiconductor layer;
forming the low withstand voltage second semiconductor element on the first and second semiconductor layers while forming the high withstand voltage first semiconductor element on the first and second semiconductor layers; and
epitaxially growing the high concentration first conductivity type third semiconductor layer on part of the surface of the second semiconductor layer before forming the first and second semiconductor elements.