Solar cell and method of manufacturing the same
View Patent ↗A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole, an emitter layer of a second conductive type opposite the first conductive type on the substrate, a first conductor electrically connected to the emitter layer, a second conductor electrically connected to the first conductor through the via hole, and a third conductor electrically connected to the substrate. The third conductor is electrically separated from the second conductor. A portion of the first conductor and a portion of the second conductor are positioned inside the via hole.
1. A solar cell comprising:
a semiconductor substrate of a first conductive type having at least one via hole;
an emitter layer of a second conductive type opposite the first conductive type on the semiconductor substrate;
a first conductor positioned on the emitter layer at an incident surface of the semiconductor substrate and connected to the emitter layer, a portion of the first conductor being positioned inside the via hole;
a second conductor directly positioned on the emitter layer at a surface of the semiconductor substrate opposite the incident surface and connected to the first conductor through the via hole, a portion of the second conductor being positioned inside the via hole; and
a third conductor positioned on the surface of the semiconductor substrate opposite the incident surface and connected to the semiconductor substrate, the third conductor being separated from the first and second conductors,
wherein the second conductor and the third conductor are positioned on a same stratum, and
wherein a material of the first conductor and a material of the second conductor are different.
2. The solar cell of claim 1 , wherein one of the first conductor and the second conductor contains lead (Pb).
3. The solar cell of claim 2 , wherein the first conductor contains Pb.
4. The solar cell of claim 1 , wherein a height of the portion of the first conductor inside the via hole is different from a height of the portion of the second conductor inside the via hole.
5. The solar cell of claim 1 , further comprising:
first and second portions of the via hole, wherein the first portion is closer to the incident surface than the second portion, and an amount of Pb in the first portion is greater than an amount of Pb in the second portion.
6. The solar cell of claim 5 , wherein the second portion lacks Pb.
7. The solar cell of claim 1 , further comprising an anti-reflection layer on the emitter layer and on a portion of a wall of the semiconductor substrate that forms the via hole.
8. The solar cell of claim 1 , wherein the emitter layer is also formed in the via hole.
9. A method of manufacturing a solar cell comprising:
forming at least one via hole on a semiconductor substrate of a first conductive type;
forming an emitter layer of a second conductive type opposite the first conductive type on the semiconductor substrate;
printing a first paste on a portion of an inner space of the via hole and on the emitter layer at an incident surface of the semiconductor substrate to form a first conductor pattern, and printing a second paste having a material that is different from a material of the first paste directly on the emitter layer at a surface of the semiconductor substrate opposite the incident surface and on a remaining portion of the inner space of the via hole to form a second conductor pattern connected to the first conductor pattern;
printing a third paste on a remaining portion excluding a formation portion of the second conductor pattern on the surface of the semiconductor substrate opposite the incident surface to form a third conductor pattern, the third conductor pattern being separated from the first and second conductor patterns; and
performing a thermal process on the semiconductor substrate having the first, second, and third conductor patterns to form a first conductor using the first conductor pattern, to form a second conductor electrically connected to the first conductor through the emitter layer and the via hole using the second conductor pattern, and to form a third conductor electrically connected to the semiconductor substrate using the third conductor pattern,
wherein the second conductor and the third conductor are positioned on a same stratum.
10. The method of claim 9 , wherein the first paste includes Pb.
11. The method of claim 9 , wherein the first paste is printed before the second paste.
12. The method of claim 9 , wherein the second pasted is printed before the first paste.
13. The method of claim 9 , wherein a Pb content in the first paste is approximately 1% to 3% based on total weight of the first paste.
14. The method of claim 9 , further comprising forming a first exposing portion which exposes a portion of the semiconductor substrate between the second conductor and the third conductor to electrically separate the second conductor from the third conductor.
15. The method of claim 14 , further comprising removing a portion of the emitter layer formed at an edge of the incident surface of the semiconductor substrate to form a second exposing portion which exposes a portion of the incident surface of the semiconductor substrate.