Thin film transistor array panel and method for manufacturing the same

1. A thin film transistor substrate comprising:

an insulation substrate;

a gate line formed on the insulation substrate;

a first interlayer insulating layer formed on the gate line;

a data line and a gate electrode formed on the first interlayer insulating layer;

a gate insulating layer formed on the data line and gate electrode;

a semiconductor formed on the gate insulating layer and overlapping the gate electrode;

a second interlayer insulating layer formed on the semiconductor;

a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other;

a drain electrode connected to the semiconductor;

a pixel electrode connected to the drain electrode; and

a second connection connecting the data line and the semiconductor to each other.

2. The thin film transistor substrate of claim 1 , wherein the pixel electrode, the drain electrode, and the first and second connections are formed of a same material.

3. The thin film transistor substrate of claim 2 , wherein the pixel electrode and the drain electrode are formed as one body.

4. The thin film transistor substrate of claim 1 , wherein the first interlayer insulating layer is made of an organic insulating material.

5. The thin film transistor substrate of claim 1 , wherein the gate line includes a copper layer.

6. The thin film transistor substrate of claim 5 , wherein the gate line further includes a seed layer formed under the copper layer.

7. The thin film transistor substrate of claim 6 , wherein the seed layer is made of Ti or Ni.

8. The thin film transistor substrate of claim 5 , wherein the semiconductor is made of an oxide semiconductor.

9. The thin film transistor substrate of claim 8 , wherein the semiconductor is made of an oxide semiconductor including at least one of Zn, Ga, Sn, Hf, and In.

10. The thin film transistor substrate of claim 8 , further comprising a storage electrode line formed on the first interlayer insulating layer and parallel to the data line.

11. The thin film transistor substrate of claim 10 , wherein the storage electrode line includes a plurality of storage electrodes extending from the storage electrode line.

12. The thin film transistor substrate of claim 8 , further comprising a storage electrode line formed on the insulation substrate and parallel to the gate line.

13. The thin film transistor substrate of claim 12 , wherein the storage electrode line includes a plurality of protrusions extending from the storage electrode line.

14. The thin film transistor substrate of claim 12 , further comprising a capacitive conductor formed on the first interlayer insulating layer and connected to the storage electrode line.

15. The thin film transistor substrate of claim 14 , further comprising a third connection formed on the second interlayer insulating layer and connecting the storage electrode line and the capacitive conductor to each other.

16. The thin film transistor substrate of claim 15 , wherein the third connection is made of a same material as the pixel electrode.

17. The thin film transistor substrate of claim 1 , wherein the semiconductor is made of an oxide semiconductor.

18. The thin film transistor substrate of claim 1 , further comprising a storage electrode line formed on the first interlayer insulating layer and parallel to the data line.

19. The thin film transistor substrate of claim 1 , further comprising:

a storage electrode line formed on the insulation substrate and parallel to the gate line;

a capacitive conductor formed on the first interlayer insulating layer and overlapping the pixel electrode; and

a third connection formed on the second interlayer insulating layer and connecting the storage electrode line and the capacitive conductor to each other.

20. The thin film transistor substrate of claim 1 , wherein the second interlayer insulating layer is made of silicon oxide or silicon nitride.