Electrostatic discharge diode
View Patent ↗The present invention relates to an electrostatic discharge diode. The electrostatic discharge diode according to exemplary embodiment of the present invention includes: an N-type well formed on a substrate; an n− region formed on the N-type well; a plurality of p− regions penetrated and formed in the n− region; a plurality of n+ regions penetrated and formed in a first layer in which the n− region and a plurality of the p− regions are formed; a plurality of n+ regions penetrated and formed in a first layer in which the n− region and a plurality of the p− regions are formed; and a plurality of p+ regions penetrated and formed in the first layer, wherein a first n+ region among a plurality of the n+ regions and a first p+ region corresponding to the first n+ region are penetrated and formed in each other region of the corresponding first p− region among a plurality of the p− regions.
1. An electrostatic discharge diode comprising:
an N-type well formed on a substrate;
an n− region formed in the N-type well;
a plurality of p− regions formed in the n− region;
a plurality of n+ regions formed in a first layer in which the n− region and a plurality of the p− regions are formed; and
a plurality of p+ regions formed in the first layer,
wherein a first n+ region among the plurality of n+ regions and a first p+ region among the plurality of p+ regions are formed across a boundary of a first p− region among the plurality of p− regions.
2. The electrostatic discharge diode of claim 1 , wherein each of the plurality of n+ regions is formed in the n− region and a p− region among the plurality of p− regions, and each of the plurality of p+ regions is formed in the n− region and a p− region among the plurality of p− regions.
3. The electrostatic discharge diode of claim 2 , wherein
a first diode is formed between the first p− region and the first n+ region, and a second diode is formed between the first p− region and the n− region.
4. The electrostatic discharge diode of claim 3 , wherein
a third diode is formed between a second p+ region that is near the first n+ region and the n− region, and a fourth diode is formed between a second p− region in which a portion of the second p+ region is formed and the n− region.
5. The electrostatic discharge diode of claim 4 , wherein
a trigger voltage at the first diode is higher than a trigger voltage at the third diode, which is higher than trigger voltages at the second and fourth diodes.
6. The electrostatic discharge diode of claim 4 , wherein
the first p+ region and the second p+ region are connected to each other.
7. The electrostatic discharge diode of claim 4 , wherein
a first resistor is formed between the first n+ region and the n− region, and a second resistor is formed between the first p+ region and the first p− region.
8. The electrostatic discharge diode of claim 1 , wherein
the plurality of n+ regions is formed in the n− region and a p− region among the plurality of p− regions, and p+ regions in the plurality of p+ regions are respectively formed in a p− region among the plurality of p− regions.
9. The electrostatic discharge diode of claim 8 , wherein
a first diode is formed between the first p− region and the first n+ region, and a second diode is formed between the first p− region and the n− region.
10. The electrostatic discharge diode of claim 9 , wherein
a third diode is formed between a second p− region in which a second p+ region near the first n+ region is formed and the n− region.
11. The electrostatic discharge diode of claim 10 , wherein
a trigger voltage of the first diode is higher than trigger voltages of the second and third diodes.
12. The electrostatic discharge diode of claim 10 , wherein
the first p+ region and the second p+ region are connected to each other.
13. The electrostatic discharge diode of claim 10 , wherein
a first resistor is formed between the first p+ region and the first p− region.
14. A electrostatic discharge diode comprising:
an N+ BL (Blocking Layer) formed on a substrate;
a plurality of n− regions formed on the N+ BL;
a plurality of p− regions formed on the N+ BL and alternately formed with the plurality of n− regions in a horizontal direction;
a plurality of n+ regions formed in a first layer in which the plurality of n− regions and the plurality of p− regions are formed; and
a plurality of p+ regions formed in the first layer,
wherein an n+ region among the plurality of n+ regions is formed on the N+ BL and formed across a boundary of a p− region among the plurality of p− regions.
15. The electrostatic discharge diode of claim 14 , wherein
a first n+ region among the plurality of n+ regions is formed from a first n− region among the plurality of n− regions to a first p− region that is near the first n− region.
16. The electrostatic discharge diode of claim 15 , wherein
a first diode is formed between the first p− region and the first n+ region, and a second diode is formed between the first p− region and the N+ BL.
17. The electrostatic discharge diode of claim 16 , wherein
a first p+ region, which is near the first n+ region among the plurality of p− regions, is formed from a second n− region near the first p− region to the first p− region, and a second p+ region among the plurality of p+ regions is formed from a second p− region near the first n− region to the first n− region.
18. The electrostatic discharge diode of claim 17 , wherein
a third diode is formed between the second p+ region and the first n− region, and a fourth diode is formed between the second p− region and the N+ BL.
19. The electrostatic discharge diode of claim 18 , wherein
a trigger voltage of the first diode is higher than a trigger voltage of the third diode, which is higher than trigger voltages of the second and fourth diodes.
20. The electrostatic discharge diode of claim 18 , wherein
the first p+ region and the second p+ region are connected to each other.