IP Library Granted Patent US 8,187,922
Granted Patent B2
US 8,187,922 · App. 12/557,896 · Granted May 29, 2012

Low cost flexible substrate

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Quick Facts
Patent No.
US 8,187,922
App. No.
12/557,896
Granted
May 29, 2012
Kind
B2
Abstract

A low cost flexible substrate is described which comprises a thin metal foil and a layer of solder mask. The metal foil layer is patterned to create tracks and lands for solder bonding and/or wirebonding and the layer of solder mask is patterned to create openings for solder bonding, wirebonding and/or for mounting the die. The substrate may be used as a package substrate to create a packaged die or may be used as a replacement for more expensive flexible printed circuit boards.

Claims (14)

1. A method of packaging a die comprising:

bonding a die to a flexible substrate comprising a patterned metal foil layer and a patterned layer of solder mask, the solder mask comprising one of a liquid solder mask and a dry film solder mask; and

over molding the die and the flexible substrates;

wherein the die is attached to the patterned metal foil layer through an opening in the patterned layer of solder mask.

2. The method according to claim 1 , further comprising:

forming wirebonds between pads on the die and tracks formed in the patterned metal foil layer.

3. The method according to claim 1 , further comprising:

attaching a plurality solder balls to the flexible substrate, each solder ball being attached to the metal foil layer through an opening in the layer of solder mask; and

reflowing the solder balls.

4. The method according to claim 1 , wherein the solder mask comprises a dry film solder mask.

5. The method according to claim 4 , wherein the patterned layer of solder mask has a thickness selected from 20 μm, 25 μm, 30 μm and 35 μm.

6. The method according to claim 1 , wherein the solder mask comprises a liquid solder mask and the patterned layer of solder mask is approximately 25 μm thick.

7. The method according to claim 1 , further comprising repeating the method to form a multilayer substrate and forming vias in interior solder layers.

8. The method according to claim 1 , further comprising applying the solder mask layer to the metal foil layer and patterning the metal foil.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME, PREVIOUSLY RECORDED ON REEL 023221 FRAME 0903. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 24, 2016
From: ABOUSH, ZAID; ROBINSON, PETER JOHN
To: CAMBRIDGE SILICON RADIO LIMITED
Reel/Frame 037900/0817 →
CHANGE OF NAME Recorded Sep 22, 2015
From: CAMBRIDGE SILICON RADIO LIMITED
To: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
Reel/Frame 036663/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2009
From: ABOUSH, ZAID; ROBINSON, PETER JOHN
To: CAMBRIDGE SILICON RADIO LTD.
Reel/Frame 023221/0903 →