IP Library Granted Patent US 7,973,689
Granted Patent B2
US 7,973,689 · App. 12/560,288 · Granted Jul 5, 2011

Bandpass multi-bit sigma-delta analog to digital conversion

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Quick Facts
Patent No.
US 7,973,689
App. No.
12/560,288
Granted
Jul 5, 2011
Kind
B2
Abstract

Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. A bandpass-filtered signal based on an electrical input signal and an analog feedback signal may be provided. A multi-bit digital representation of the bandpass-filtered signal may be provided. An analog representation of the multi-bit digital representation may be provided. A return-to-zero (RTZ) carving operation may be performed on the analog representation to obtain the analog feedback signal.

Claims (28)

1. A bandpass multi-bit sigma-delta analog-to-digital conversion system for data conversion of an electrical input signal, the system comprising:

a bandpass filter module configured to receive an electrical input signal and an analog feedback signal and to provide a bandpass-filtered signal;

a multi-bit quantizer coupled to the bandpass filter module and configured to provide a multi-bit digital representation of the bandpass-filtered signal; and

a feedback digital-to-analog converter (DAC) module coupled to the multi-bit quantizer and configured to provide the analog feedback signal to the bandpass filter module, the feedback DAC module comprising:

a digital-to-analog converter configured to provide an analog representation of the multi-bit digital representation, and

a return-to-zero carver circuit configured to select a portion of the analog representation within each sampling cycle.

2. The system of claim 1 , wherein the electrical input signal is a radio-frequency (RF) signal having a carrier frequency in the range of 500 MHz to 5 GHz.

3. The system of claim 1 , wherein the bandpass filter module comprises a plurality of filter stages.

4. The system of claim 3 , wherein the bandpass filter module comprises more than three filter stages.

5. The system of claim 3 , wherein each of the plurality of filter stages comprises a bandpass filter and an amplifier.

6. The system of claim 5 , wherein each of the plurality of filter stages is characterized by a quality factor associated with the bandpass filter and a gain associated with the amplifier.

7. The system of claim 1 , wherein the bandpass filter module is configured to provide a maximum noise attenuation at a selected noise-rejection frequency.

8. The system of claim 7 , wherein the selected noise-rejection frequency is greater than 1 GHz.

9. The system of claim 1 , wherein the multi-bit quantizer is configured to quantize the bandpass-filtered signal at an L-bit resolution, wherein L is a value greater than 1.

10. The system of claim 9 , wherein L is a fractional value greater than 1.

11. The system of claim 1 , wherein the multi-bit quantizer comprises a flash analog-to-digital converter.

12. The system of claim 1 , wherein the multi-bit quantizer is configured to provide the digital representation at a rate given by f s =M×f N ,

wherein M is an oversampling factor and f N is Nyquist frequency.

13. The system of claim 1 , wherein the portion of the analog representation selected by the return-to-zero carver circuit is adjustable.

14. The system of claim 1 , wherein the feedback DAC module is coupled to the multi-bit quantizer via a mismatch shaping circuit configured to switch bits of the multi-bit quantizer.

15. A software-defined radio system comprising the system of claim 1 .

16. The software-defined radio system of claim 15 , further comprising a digital signal processor configured to process the digital representation of the bandpass-filtered signal according to a selected communication standard.

17. A method of performing a sigma-delta analog-to-digital conversion of an electrical input signal, the method comprising:

providing a bandpass-filtered signal based on an electrical input signal and an analog feedback signal;

providing a multi-bit digital representation of the bandpass-filtered signal;

providing an analog representation of the multi-bit digital representation; and

performing a return-to-zero (RTZ) carving operation on the analog representation to obtain the analog feedback signal, the carving operation including selecting a portion of the analog representation.

18. The method of claim 17 , wherein performing the RTZ carving operation comprises outputting an analog signal corresponding to the analog representation during a selected time portion within a sampling period and returning to zero at other times.

Assignments (7)
ASSIGNMENT OF PATENT SECURITY INTEREST PREVIOUSLY RECORDED AT REEL/FRAME (040646/0799) Recorded Feb 17, 2023
From: HSBC BANK USA, NATIONAL ASSOCIATION, AS RESIGNING AGENT
To: JPMORGAN CHASE BANK, N.A., AS SUCCESSOR AGENT
Reel/Frame 062781/0544 →
SECURITY INTEREST Recorded Nov 17, 2016
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.; SEMTECH EV, INC.; TRIUNE SYSTEMS, L.L.C.; TRIUNE IP, LLC
To: HSBC BANK USA, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 040646/0799 →
RELEASE OF SECURITY INTEREST Recorded May 2, 2013
From: JEFFERIES FINANCE LLC
To: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.
Reel/Frame 030341/0059 →
SECURITY AGREEMENT Recorded May 2, 2013
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 030341/0099 →
GRANT OF SECURITY INTEREST Recorded Mar 20, 2012
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 027897/0141 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2010
From: SIERRA MONOLITHICS, INC.
To: SEMTECH CORPORATION
Reel/Frame 024512/0414 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2009
From: GLASS, KEVIN WILLIAM; HORNBUCKLE, CRAIG A.; NILSSON, C. GARY
To: SIERRA MONOLITHICS, INC.
Reel/Frame 023236/0154 →