Method And System For Packet Preemption Via Packet Rescheduling
Link partners coupled via an Ethernet link comprise memory buffers and/or PHY devices and the memory buffers may be operable to buffer packets that are pending delivery via the PHY devices. Latency requirements may be determined by inspecting OSI layer 2 or higher OSI layer information. Markings within packets may be inspected for latency requirements. An order of communicating buffered packets may be determined based on latency requirements. Corresponding packet headers may be ordered based on the latency requirements. Packet delivery may be scheduled based on the latency requirements. A specified time and/or a specified quantity of buffered data, which may be statically or dynamically programmable and/or configurable, may trigger determination of latency requirements. Packets may be delivered after an indication that prior packets have been delivered. Latency requirements may depend on a device that may generate and/or render the packets.
1 . A method for communication, the method comprising:
in an Ethernet network comprising link partners that are coupled via an Ethernet link, one or more of said link partners comprising one or more PHY devices and one or more memory buffers that are operable to buffer packets that are pending delivery via said one or more PHY devices:
determining latency requirements of one or more packets buffered in said one or more memory buffers that are pending delivery; and
communicating said buffered packets that are pending delivery to said link partner in an order that is determined utilizing said determined latency requirements.
2 . The method according to claim 1 , comprising inspecting OSI layer 2 or higher OSI layer information within said buffered packets that are pending delivery to determine said latency requirements.
3 . The method according to claim 1 , comprising inspecting one or more markings within said buffered packets that are pending delivery to determine said latency requirements.
4 . The method according to claim 1 , comprising ordering said buffered packets that are pending delivery based on said determined latency requirements.
5 . The method according to claim 1 , comprising ordering packet headers corresponding to said buffered packets that are pending delivery based on said determined latency requirements.
6 . The method according to claim 5 , comprising scheduling delivery of said buffered packets that are pending delivery based on said determined latency requirements.
7 . The method according to claim 1 , wherein said latency requirements may be determined within a specified time and/or for a specified quantity of data corresponding to said buffered packets that are pending delivery.
8 . The method according to claim 7 , wherein said specified time and/or said specified quantity of data that is pending delivery is statically or dynamically programmable and/or configurable.
9 . The method according to claim 1 , comprising waiting for an indication that specifies an end of a delivery of other prior packets before communicating said buffered packets that are pending delivery to said link partner.
10 . The method according to claim 1 , wherein said determined latency requirements depend on an application and/or a capability of a device that generates and/or renders said packets that are pending delivery.
11 . A system for communication, the system comprising:
one or more circuits for use in an Ethernet network comprising link partners that are coupled via an Ethernet link, said one or more circuits comprising one or more PHY devices and one or more memory buffers that are operable to buffer packets that are pending delivery via said one or more PHY devices, wherein said one or more circuits are operable to:
determine latency requirements of one or more packets buffered in said one or more memory buffers that are pending delivery; and
communicate said buffered packets that are pending delivery to said link partner in an order that is determined utilizing said determined latency requirements.
12 . The system according to claim 11 , wherein said one or more circuits are operable to inspect OSI layer 2 or higher OSI layer information within said buffered packets that are pending delivery to determine said latency requirements.
13 . The method according to claim 11 , wherein said one or more circuits are operable to inspect one or more markings within said buffered packets that are pending delivery to determine said latency requirements.
14 . The system according to claim 11 , wherein said one or more circuits are operable to order said buffered packets that are pending delivery based on said determined latency requirements.
15 . The system according to claim 11 , wherein said one or more circuits are operable to order packet headers corresponding to said buffered packets that are pending delivery based on said determined latency requirements.
16 . The system according to claim 15 , wherein said one or more circuits are operable to schedule delivery of said buffered packets that are pending delivery based on said determined latency requirements.
17 . The system according to claim 11 , wherein said latency requirements may be determined within a specified time and/or for a specified quantity of data corresponding to said buffered packets that are pending delivery.
18 . The system according to claim 17 , wherein said specified time and/or said specified quantity of data that is pending delivery is statically or dynamically programmable and/or configurable.
19 . The system according to claim 11 , wherein said one or more circuits are operable to wait for an indication that specifies an end of a delivery of other prior packets before communicating said buffered packets that are pending delivery to said link partner.
20 . The system according to claim 11 , wherein said determined latency requirements depend on an application and/or a capability of a device that generates and/or renders said packets that are pending delivery.