IP Library Granted Patent US 8,952,315
Granted Patent B2
US 8,952,315 · App. 12/574,494 · Granted Feb 10, 2015

Solid-state imaging device having a vertical transistor with a dual polysilicon gate

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,952,315
App. No.
12/574,494
Granted
Feb 10, 2015
Kind
B2
Abstract

A solid-state imaging device includes: a pixel part having a photoelectric conversion part photoelectrically converting incident light to obtain signal charge; and a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate. The pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor. The vertical transistor has a groove part formed on the semiconductor substrate; a gate insulator film formed on an inner surface of the groove part; a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part; a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; and an electrode layer connected to the conducting layer on the filling layer.

Claims (45)

1. A solid-state imaging device comprising:

a pixel part having a photoelectric conversion part that photoelectrically converts incident light to obtain signal charge; and

a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate,

the pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor,

the vertical transistor having

a groove part formed in the semiconductor substrate;

a gate insulator film formed on an inner surface of the groove part;

a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part;

a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; and

an electrode layer in electrical communication with the conducting layer located above the filling layer, and wherein the conducting layer includes polysilicon containing an N-type impurity or a P-type impurity, and

the filling layer includes a metal or a metal compound or polysilicon formed separately from the conducting layer and further wherein a gate electrode of the vertical transistor and the planar transistor are each comprised of a same first and second polysilicon material.

2. The solid-state imaging device according to claim 1 , wherein

the filling layer includes non-doped polysilicon.

3. The solid-state imaging device according to claim 1 , wherein the peripheral circuit part has an N-channel transistor and a P-channel transistor,

a gate electrode of the N-channel transistor is of N-type, and

a gate electrode of the P-channel transistor is of P-type.

4. The solid-state imaging device according to claim 1 , wherein the peripheral circuit part has an N-channel transistor and a P-channel transistor,

a first gate electrode of the N-channel transistor is formed by a metal or a metal compound having conductivity, and

a second gate electrode of the P-channel transistor is formed by a metal or a metal compound having conductivity having a work function higher than that of the first gate electrode.

5. A solid-state imaging device comprising:

a pixel part having a photoelectric conversion part that photoelectrically converts incident light to obtain signal charge; and

a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate,

the pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor,

the vertical transistor having

a groove part formed in the semiconductor substrate;

a gate insulator film formed on an inner surface of the groove part;

a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part;

a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; and

an electrode layer in electrical communication with the conducting layer located above the filling layer, and wherein the conducting layer includes a metal or a metal compound, and

the filling layer includes a metal or a metal compound or polysilicon formed separately from the conducting layer, wherein the conducting layer includes a metal or a metal compound having conductivity, and

the filling layer includes a metal or a metal compound different from that of the conducting layer or polysilicon and further wherein a gate electrode of the vertical transistor and the planar transistor are each comprised of a same first and second polysilicon material.

6. The solid-state imaging device according to claim 5 , wherein the conducting layer includes a metal or a metal compound that controls a work function of the vertical transistor.

7. An imaging apparatus comprising:

an imaging optical unit that collects incident light;

a solid-state imaging device that receives and photoelectrically converts the light collected by the imaging optical unit; and

a signal processing unit that processes a photoelectrically converted signal,

wherein the solid-state imaging device includes a pixel part having a photoelectric conversion part that photoelectrically converts incident light to obtain signal charge and a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate,

the pixel part has a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor, and

the vertical transistor has

a groove part formed in the semiconductor substrate;

a gate insulator film formed on an inner surface of the groove part,

a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part,

a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer, and

an electrode layer connected to the conducting layer on the filling layer, and wherein the conducting layer includes polysilicon containing an N-type impurity or a P-type impurity, and

the filling layer includes a metal or a metal compound or polysilicon formed separately from the conducting layer and further wherein a gate electrode of the vertical transistor and the planar transistor are each comprised of a same first and second polysilicon material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2009
From: OHTA, KAZUNOBU; HIRANO, TOMOYUKI
To: SONY CORPORATION
Reel/Frame 023336/0423 →