IP Library Granted Patent US 8,138,503
Granted Patent B2
US 8,138,503 · App. 12/575,308 · Granted Mar 20, 2012

Display substrate having a protruding barrier pattern

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Quick Facts
Patent No.
US 8,138,503
App. No.
12/575,308
Granted
Mar 20, 2012
Kind
B2
Abstract

A display substrate includes a base substrate, a barrier pattern, a source electrode, a drain electrode, a semiconductor layer, an insulating layer, and a gate electrode. The barrier pattern protrudes from the base substrate. The source and gate electrodes are formed adjacent to opposite sides of the barrier pattern on the base substrate. The semiconductor layer is provided on the barrier pattern to connect the source electrode with the drain electrode, and the insulating layer covers the semiconductor layer, the source electrode, and the drain electrode. The gate electrode is provided on the insulating layer, and is overlapped with the semiconductor layer.

Claims (18)

1. A display substrate comprising:

a base substrate;

a barrier pattern that protrudes from the base substrate;

a source electrode adjacent to a first side of the barrier pattern on the base substrate;

a drain electrode adjacent to a second side of the barrier pattern on the base substrate;

a semiconductor layer provided on the barrier pattern to connect the source electrode to the drain electrode;

an insulating layer that covers the semiconductor layer, the source electrode, and the drain electrode; and

a gate electrode provided on the insulating layer and overlapping the semiconductor layer.

2. The display substrate of claim 1 , wherein the barrier pattern is integrally formed with the base substrate.

3. The display substrate of claim 2 , wherein the base substrate is a flexible substrate.

4. The display substrate of claim 3 , wherein the flexible substrate comprises one of polyethylene terephthalate, polyethersulphone, polyetheretherketone, polyetherimide, polyimide, polyethyelene naphtalate, polycarbonate, and fiberglass reinforced plastics.

5. The display substrate of claim 1 , wherein the barrier pattern comprises an insulating material on the base substrate.

6. The display substrate of claim 5 , wherein the insulating material comprises one of silicon nitride, silicon oxide, aluminum oxide, and tantalum pentoxide.

7. The display substrate of claim 1 , wherein the semiconductor layer comprises an organic material.

8. The display substrate of claim 1 , wherein the semiconductor layer comprises oxide.

9. The display substrate of claim 1 , further comprising a protective layer provided on the gate electrode.

10. The display substrate of claim 9 , further comprising a pixel electrode provided on the protective layer, and electrically connected to the drain electrode.

11. The display substrate of claim 1 , wherein the barrier pattern has a thickness equal to or larger than thicknesses of the source and drain electrodes.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2020
From: SAMSUNG DISPLAY CO., LTD.
To: HYDIS TECHNOLOGIES CO., LTD.
Reel/Frame 052598/0856 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029008/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2009
From: NOH, JUNG-HUN; KIM, MYUNG-HWAN; CHO, SEUNG-HWAN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023340/0981 →