IP Library Granted Patent US 9,472,783
Granted Patent B2
US 9,472,783 · App. 12/577,629 · Granted Oct 18, 2016

Barrier coating with reduced process time

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Quick Facts
Patent No.
US 9,472,783
App. No.
12/577,629
Granted
Oct 18, 2016
Kind
B2
Abstract

The present techniques provide systems and methods for protecting electronic devices such as organic light emitting devices (OLEDs) from adverse environmental effects using a thin film encapsulation with reduced process time. In some embodiments, the process time of forming a graded barrier over the OLED structure may take less than 5 minutes, and may result in substantially similar barrier properties as those of metal and epoxy sealants and/or typical thin film encapsulations. The process time of forming the barrier may be reduced by increasing deposition rates for organic and/or inorganic materials, reducing the thicknesses of organic and/or inorganic layers, and/or varying the number of zones in the barrier.

Claims (21)

1. A method of forming a barrier coating, the method comprising:

depositing substantially organic materials to form an organic zone at an organic material deposition rate greater than 25 nm/min, wherein the organic material deposition rate is approximately 50-100 nm/min, and wherein the organic zone is between 25-300 nm thick; and

depositing substantially inorganic materials to form an inorganic zone, wherein a water vapor transmission rate through the barrier coating comprising the organic zone and the inorganic zone is less than 10 −3 g/m 2 /day.

2. A method of forming a barrier coating, the method comprising:

depositing substantially organic materials to form an organic zone at an organic material deposition rate greater than 25 nm/min; and

depositing substantially inorganic materials to form an inorganic zone at an inorganic material deposition rate of approximately 30-60 nm/min, wherein the inorganic zone is between 20-30 nm thick, and wherein a water vapor transmission rate through the barrier coating comprising the organic zone and the inorganic zone is less than 10 −3 g/m 2 /day.

3. The method of claim 1 , further comprising forming three zones in the barrier, wherein at least one of the three zones comprises organic materials and another one of the three zones comprises inorganic materials.

4. The method of claim 1 , wherein the substantially organic materials and the substantially inorganic materials are deposited via a plasma-enhanced chemical vapor deposition (PECVD) technique.

5. The method of claim 1 , wherein the barrier coating comprising the substantially organic materials and the substantially inorganic materials are deposited in 5 minutes or less.

6. A method of encapsulating an electronic device on a substrate, the method comprising:

determining a selected deposition rate greater than 25 nm/min; and

depositing substantially organic materials at the selected deposition rate, wherein the organic materials are deposited until a thickness of an organic zone is between 25-300 nm, and wherein the substantially organic materials form part of a barrier encapsulating one or more of the electronic device and the substrate.

7. The method of claim 6 , wherein determining the selected deposition rate, comprises:

determining the thickness of the organic materials to be formed;

selecting either a plasma enhanced (PE) deposition mode or a reactive ion etch (RIE) deposition mode;

configuring an excitation power in a reaction chamber based on the deposition mode selected;

selecting a ratio of precursor gas and carrier gas used in the reaction chamber based on the deposition mode selected and the excitation power configured;

selecting a chamber pressure based on the deposition mode selected and the excitation power configured;

or a combination thereof.

8. The method of claim 7 , wherein the excitation power is configured such that a power density on an electrode of the electronic device is greater than 0.1 W/cm 2 .

9. The method of claim 6 , comprising depositing inorganic materials to form part of the barrier, such that the barrier is formed in 5 minutes or less.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2025
From: GENERAL ELECTRIC COMPANY
To: GE INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070636/0815 →
CHANGE OF NAME Recorded Mar 26, 2025
From: GE INTELLECTUAL PROPERTY LICENSING, LLC
To: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070643/0907 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2025
From: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
To: EDISON INNOVATIONS, LLC
Reel/Frame 070293/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2009
From: ERLAT, AHMET GUN; DALAKOS, GEORGE THEODORE; SCHERER, BRIAN JOSEPH
To: GENERAL ELECTRIC COMPANY
Reel/Frame 023360/0892 →