Memory module, memory system, and information device
A memory system including ROM and RAM in which reading and writing are enabled. A memory system includes a non-volatile memory (FLASH), DRAM, a control circuit, and an information processing device. Data in FLASH is transferred to SRAM or DRAM in advance. Data transfer between the non-volatile memory and the DRAM can be performed in the background. The memory system including these plural chips is configured as a memory system module in which each chip is mutually laminated and each chip is wired via a ball grid array (BGA) and bonding wire between the chips. Data in FLASH can be read at the similar speed to that of DRAM by securing a region in which the data in FLASH can be copied in DRAM and transferring the data to DRAM in advance immediately after power is turned on or by a load instruction.
1. A memory system including a memory module having a non-volatile memory, a dynamic random access memory, a static random access memory, and a first control circuit that accesses the non-volatile memory, the dynamic random access memory, and the static random access memory, comprising:
a dynamic random access memory interface for accessing, from a device outside the memory module, the dynamic random access memory and the static random access memory,
wherein:
the dynamic random access memory includes plural interfaces, and
the plural interfaces are interfaces for accessing at least two types of different memories.
2. A memory system including a memory module having a non-volatile memory, a dynamic random access memory, a static random access memory, and a first control circuit that accesses the non-volatile memory, the dynamic random access memory, and the static random access memory, comprising:
a dynamic random access memory interface for accessing, from a device outside the memory module, the dynamic random access memory and the static random access memory,
wherein:
the dynamic random access memory includes plural interfaces, and the plural interfaces are the dynamic random access memory interface and a non-volatile memory interface.