IP Library Granted Patent US 7,973,303
Granted Patent B2
US 7,973,303 · App. 12/580,152 · Granted Jul 5, 2011

Nitride semiconductor device

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Quick Facts
Patent No.
US 7,973,303
App. No.
12/580,152
Granted
Jul 5, 2011
Kind
B2
Abstract

A nitride semiconductor device includes n-type and p-type nitride semiconductor layers, an active layer, the active layer having a lamination of quantum barrier layers and quantum well layers, a thermal stress control layer disposed between the n-type nitride semiconductor layer and the active layer, and formed of a material having a smaller thermal expansion coefficient than the n-type and p-type nitride semiconductor layers, and a lattice stress control layer disposed between the thermal stress control layer and the active layer, and including a first layer and a second layer.

Claims (17)

1. A nitride semiconductor device comprising:

n-type and p-type nitride semiconductor layers;

an active layer disposed between the n-type and p-type nitride semiconductor layers, the active layer having a lamination of quantum barrier layers and quantum well layers alternated with each other;

a thermal stress control layer disposed between the n-type nitride semiconductor layer and the active layer, and formed of a material having a smaller thermal expansion coefficient than the n-type and p-type nitride semiconductor layers; and

a lattice stress control layer disposed between the thermal stress control layer and the active layer, and including a first layer and a second layer, wherein

the first layer is formed of a material having a band gap energy which is less than that of the thermal stress control layer and greater than that of the quantum well layer, and has a pit in a top surface thereof, and

the second layer is formed of a different material from the first layer, and is disposed between the first layer and the active layer, filling the pit.

2. The nitride semiconductor device of claim 1 , wherein the thermal stress control layer is formed of Al x1 In y1 Ga (1-x1) N where 0<x1≦1 and 0≦y1≦0.01.

3. The nitride semiconductor device of claim 2 , wherein the n-type and p-type nitride semiconductor layers are formed of GaN.

4. The nitride semiconductor device of claim 1 , wherein the thermal stress control layer includes a third layer formed of Al x1 In y1 Ga (1-x1) N where 0<x1≦1 and 0≦y1≦0.01, and a fourth layer disposed between the third layer and the lattice stress control layer and formed of a different material from the third layer.

5. The nitride semiconductor device of claim 4 , wherein the fourth layer is formed of Al x2 Ga (1-x2) N where 0≦x2<1.

6. The nitride semiconductor device of claim 1 , wherein the thermal stress control layer has a thickness of 100 nm or more.

7. The nitride semiconductor device of claim 1 , wherein the first layer is formed of Al x3 In y3 Ga (1-x3-y3) N where 0≦x3<1 and 0<y3<1.

8. The nitride semiconductor device of claim 7 , wherein the second layer is formed of Al x4 In y4 Ga (1-x4-y4) N where 0≦x4<1 and 0≦y4<y3.

9. The nitride semiconductor device of claim 7 , wherein the first layer has an In content smaller than that of the quantum well layer.

10. The nitride semiconductor device of claim 1 , wherein the pit is formed by removing a defective portion of the first layer.

11. The nitride semiconductor device of claim 1 , wherein the first layer has a thickness of 20 nm or more.

Assignments (2)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2009
From: SAKONG, TAN; SUNG, YOUN JOON; LEE, JEONG WOOK
To: SAMSUNG LED CO., LTD.
Reel/Frame 023381/0007 →