IP Library Granted Patent US 8,352,948
Granted Patent B2
US 8,352,948 · App. 12/582,296 · Granted Jan 8, 2013

Method to automatically ReDirect SRB routines to a zIIP eligible enclave

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Quick Facts
Patent No.
US 8,352,948
App. No.
12/582,296
Granted
Jan 8, 2013
Kind
B2
Abstract

A Method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Claims (45)

1. A method of enabling an application program to run on one of a plurality of one or more financially cost effective processors, the method comprising:

replacing a reference to a SCHEDULE service, of an operating system, in a Supervisor Vector Table (SVT) with a reference to an intercept routine, the SCHEDULE service having attributes including a priority attribute and an identifier attribute and the intercept routine having the attributes of the SCHEDULE service it replaces;

intercepting, by the intercept routine, an invocation, by an originating application program, of the SCHEDULE service; and

causing the originating application program to execute on one or more of the financially cost effective processors, wherein without the replacing and intercepting, the originating application program is ineligible to execute on the one or more financially cost effective processors.

2. The method of claim 1 wherein the intercept routine comprises validation code that directs unauthorized originating application programs to the SCHEDULE service.

3. The method of claim 1 wherein the originating application program comprises a mainframe application.

4. The method of claim 1 wherein the operating system comprises z/OS.

5. The method of claim 1 wherein the one or more financially cost effective processors comprises a zIIP.

6. The method of claim 1 wherein the priority attributes includes SCOPE=GLOBAL and the identifier attribute includes a STOKEN parameter.

7. The method of claim 1 wherein the attributes of the SCHEDULE service include a DISABLE environment attribute.

8. The method of claim 5 wherein the intercept routine is associated with an enclave and the enclave is enabled for execution on the zIIP.

9. The method of claim 1 wherein the operating system and the application program are executing within a Logical Partition (LPAR) of a mainframe computer.

10. The method of claim 1 further comprising replacing a reference in an IEAVELCR routine that matches the reference to the SCHEDULE service with the reference to the intercept routine.

11. A mainframe computer comprising:

an operating system;

one or more intercepting routines; and

a plurality of processors each associated with a different financial operating cost,

wherein mainframe computer is configured to:

replace a reference to a SCHEDULE service, of the operating system, in a Supervisor Vector Table (SVT) with a reference to an intercept routine, the SCHEDULE service having attributes including a priority attribute and an identifier attribute and the intercept routine having the attributes of the SCHEDULE service it replaces,

intercept, using the intercept routine, an invocation, by an originating application program, of the SCHEDULE service,

cause the originating application program to execute on one of the processors that is more financially cost effective, wherein without the replacing and intercepting, the originating application program is ineligible to execute on the more financially cost effective processor, and

allow the originating application program to run on the more financially cost effective processor.

12. The mainframe computer of claim 11 wherein the operating system comprises z/OS.

13. The mainframe computer of claim 11 wherein the more financially cost effective processor comprises a zIIP.

14. The mainframe computer of claim 11 wherein the intercept routine comprises validation code that directs unauthorized originating application programs to the SCHEDULE service.

15. The mainframe computer of claim 11 further comprising one or more Logical Partitions (LPARs) wherein at least one LPAR is controlled by an instance of the operating system.

16. A non-transitory computer-readable medium with instructions embodied thereon to cause a programmable control device to perform the method of claim 1 .

17. The mainframe computer of claim 11 wherein mainframe computer is further configured to replace a reference in an IEAVELCR routine that matches the reference to the SCHEDULE service with the reference to the intercept routine.

18. A mainframe computer comprising:

an operating system;

one or more intercepting routines; and

a plurality of processors each associated with a different financial operating cost,

wherein mainframe computer is configured to:

replace a reference to a SCHEDULE service, of the operating system, in a prefixed save area (PSA) with a reference to a intercept routine, the SCHEDULE service having a priority attribute and the intercept routine having the priority attribute of the SCHEDULE service it replaces,

intercept, using the intercept routine, an invocation, by an originating application program, of the SCHEDULE service,

replace a reference in an IEAVELKR routine that matches the reference to the SCHEDULE service with the reference to the intercept routine,

cause the originating application program to execute on one of the plurality of processors that is more financially cost effective, wherein without the replacing and intercepting, the originating application program is ineligible to execute on the more financially cost effective processor, and

allow the originating application program to run on the more financially cost effective processor.

19. The mainframe computer of claim 18 wherein the intercept routine comprises validation code that directs unauthorized originating application programs to the SCHEDULE service.

20. The mainframe computer of claim 18 wherein the one or more financially cost effective processors comprises a zIIP.

21. The mainframe computer of claim 20 wherein the intercept routine is associated with an enclave and the enclave is enabled for execution on the zIIP.

22. The mainframe computer of claim 18 wherein the priority attribute includes SCOPE=GLOBAL.

23. The mainframe computer of claim 18 wherein the SCHEDULE service further includes a DISABLE environment attribute.

24. The mainframe computer of claim 18 wherein the operating system and the application program are executing within a Logical Partition (LPAR) of the mainframe computer.

25. The mainframe computer of claim 18 wherein the PSA is associated with a logical CPU and the mainframe computer is further configured to perform the replacing for each PSA associated with the logical CPU.

Assignments (13)
GRANT OF SECOND LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 13, 2024
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 069352/0568 →
GRANT OF FIRST LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 13, 2024
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 069352/0628 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052854/0139) Recorded Aug 6, 2024
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 068339/0617 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052844/0646) Recorded Aug 6, 2024
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 068339/0408 →
OMNIBUS ASSIGNMENT OF SECURITY INTERESTS IN PATENT COLLATERAL Recorded Mar 4, 2024
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS RESIGNING COLLATERAL AGENT
To: GOLDMAN SACHS BANK USA, AS SUCCESSOR COLLATERAL AGENT
Reel/Frame 066729/0889 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 1, 2024
From: ALTER DOMUS (US) LLC
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 066567/0283 →
GRANT OF SECOND LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Sep 30, 2021
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: ALTER DOMUS (US) LLC
Reel/Frame 057683/0582 →
SECURITY INTEREST Recorded Jun 4, 2020
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052844/0646 →
SECURITY INTEREST Recorded Jun 4, 2020
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052854/0139 →
RELEASE OF PATENTS Recorded Oct 5, 2018
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.; BMC ACQUISITION L.L.C.
Reel/Frame 047198/0468 →
SECURITY INTEREST Recorded Oct 2, 2018
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: CREDIT SUISSE, AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0744 →
SECURITY AGREEMENT Recorded Sep 11, 2013
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 031204/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2009
From: LAVIOLETTE, MICHEL
To: BMC SOFTWARE, INC.
Reel/Frame 023396/0897 →