Common-mode robust high-linearity analog switch
View Patent ↗A differential gain stage includes a plurality of programmable passive circuit component arrays operable to set a gain of the gain stage. The gain stage also includes an active switch gate control circuit and a passive switch gate control circuit. The active switch gate control circuit controls a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold. The passive switch gate control circuit controls the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance for common mode frequencies above the frequency threshold. The differential gain stage can for part of a receiver such as an xDSL receiver.
1. A method of operating a differential gain stage having a plurality of programmable passive circuit component arrays for setting a gain of the differential gain stage, the method comprising:
using an active switch gate control circuit to control a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold; and
using a passive switch gate control circuit to control the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance for common mode frequencies above the frequency threshold.
2. The method of claim 1 , comprising:
forcing the gate voltage applied to the transistor switch components to track a common AC voltage present at virtual ground nodes of the differential gain stage plus a DC voltage for common mode frequencies below the frequency threshold; and
forcing the gate voltage applied to the transistor switch components to track a common AC voltage at the source and/or drain of the transistor switch components for common mode frequencies above the frequency threshold.
3. The method of claim 2 , comprising capacitively coupling at least one of the source and drain of each transistor switch component to the gate of the transistor switch component for common mode frequencies above the frequency threshold.
4. The method of claim 2 , comprising applying a weighted sum of the common AC voltages at the source and drain of each transistor switch component to the gate of the transistor switch component for common mode frequencies above the frequency threshold.
5. The method of claim 1 , comprising isolating the active switch gate control circuit from the gates of the transistor switch components for common mode frequencies above the frequency threshold.
6. The method of claim 1 , further comprising switching off one or more of the transistor switch components by decoupling the gate of the one or more transistor switch components from the active switch gate control circuit and coupling the gate of the one or more transistor switch components to a potential sufficient for switching off the one or more transistor switch components.
7. A differential gain stage, comprising:
a plurality of programmable passive circuit component arrays operable to set a gain of the differential gain stage;
an active switch gate control circuit operable to control a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold; and
a passive switch gate control circuit operable to control the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance for common mode frequencies above the frequency threshold.
8. The differential gain stage of claim 7 , wherein the active switch gate control circuit comprises a level shifter operable to force the gate voltage applied to the transistor switch components to track a common AC voltage present at virtual ground nodes of the differential gain stage plus a DC voltage for common mode frequencies below the frequency threshold, and wherein the passive switch gate control circuit comprises RC circuitry operable to force the gate voltage applied to the transistor switch components to track a common AC voltage at the source and/or drain of the transistor switch components for common mode frequencies above the frequency threshold.
9. The differential gain stage of claim 8 , wherein the RC circuitry comprises a capacitor operable to capacitively couple the source or the drain of each transistor switch component to the gate of the transistor switch component for common mode frequencies above the frequency threshold.
10. The differential gain stage of claim 8 , wherein the RC circuitry comprises a first capacitor coupled between the source of each transistor switch component and the gate of the transistor switch component and a second capacitor coupled between the drain of each transistor switch component and the gate of the transistor switch component, the first and second capacitors being operable to apply a weighted sum of the common AC voltages at the source and the drain of each transistor switch component to the gate of the transistor switch component for common mode frequencies above the frequency threshold.
11. The differential gain stage of claim 7 , wherein the passive switch gate control circuit comprises an isolation resistor and one or more capacitors operable to isolate the active switch gate control circuit from the gates of the transistor switch components for common mode frequencies above the frequency threshold.
12. The differential gain stage of claim 11 , wherein the active switch gate control circuit comprises a transistor operable to pass a DC supply voltage to the isolation resistor of the passive switch gate control circuit responsive to the active switch gate control circuit being inactive for common mode frequencies above the frequency threshold.
13. The differential gain stage of claim 7 , wherein the passive switch gate control circuit comprises a first transistor operable to decouple the gate of one or more of the transistor switch components from the active switch gate control circuit and a second transistor operable to couple the gate of the one or more transistor switch components to a potential sufficient for switching off the one or more transistor switch components.
14. The differential gain stage of claim 7 , wherein each programmable passive circuit component array is a programmable resistor array.
15. A differential gain stage, comprising:
a plurality of programmable passive circuit component arrays operable to set a gain of the differential gain stage;
a first means for controlling a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold; and
a second means for controlling the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance and isolating the first means for controlling the gate voltage from the gates of the transistor switch components for common mode frequencies above the frequency threshold.
16. A method of operating a receiver, comprising:
inputting a received signal to a differential gain stage of the receiver, the differential gain stage having a plurality of programmable passive circuit component arrays for setting a gain of the differential gain stage;
using an active switch gate control circuit to control a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold; and
using a passive switch gate control circuit to control the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance for common mode frequencies above the frequency threshold.
17. The method of claim 16 , wherein the received signal is a DSL-based signal.
18. The method of claim 16 , comprising isolating the active switch gate control circuit from the gates of the transistor switch components for common mode frequencies above the frequency threshold.
19. A receiver, comprising:
an input stage operable to receive a signal transmitted over a communication link, the input stage including a differential gain stage comprising:
a plurality of programmable passive circuit component arrays operable to set a gain of the differential gain stage,
an active switch gate control circuit operable to control a gate voltage applied to transistor switch components of each programmable passive circuit component array as a function of the level of common mode disturbance input to the differential gain stage for common mode frequencies below a particular frequency threshold, and
a passive switch gate control circuit operable to control the gate voltage applied to the transistor switch components as a function of the level of common mode disturbance for common mode frequencies above the frequency threshold; and
a filter coupled to an output of the input stage.
20. A transceiver including the receiver of claim 19 .
21. The receiver of claim 19 , wherein the receiver is a DSL-compliant receiver.
22. The receiver of claim 19 , wherein the active switch gate control circuit comprises a level shifter operable to force the gate voltage applied to the transistor switch components to track a common AC voltage present at virtual ground nodes of the differential gain stage plus a DC voltage for common mode frequencies below the frequency threshold, and wherein the passive switch gate control circuit comprises RC circuitry operable to force the gate voltage applied to the transistor switch components to track a common AC voltage at the source and/or drain of the transistor switch components for common mode frequencies above the frequency threshold.
23. The receiver of claim 19 , wherein the passive switch gate control circuit comprises an isolation resistor and one or more capacitors operable to isolate the active switch gate control circuit from the gates of the transistor switch components for common mode frequencies above the frequency threshold.
24. The receiver of claim 23 , wherein the active switch gate control circuit comprises a transistor operable to pass a DC supply voltage to the isolation resistor of the passive switch gate control circuit responsive to the active switch gate control circuit being inactive for common mode frequencies above the frequency threshold.
25. The receiver of claim 19 , wherein each programmable passive circuit component array is a programmable resistor array.