Inkjet printer system having equalised control of different nozzle count printhead ICs
View Patent ↗An inkjet printer system is provided having a printhead and controller. The printhead has a row of inkjet nozzles for printing one ink color formed by adjacent inkjet nozzle rows of adjacent integrated circuits. Each integrated circuit has a different number of inkjet nozzles in the respective inkjet nozzle row. The controller is configured to transfer print data to each of the integrated circuits at a rate proportional to the relative number of inkjet nozzles so that the print data is transferred to each of the integrated circuits in equal time.
1. An inkjet printer system comprising:
a printhead comprising a row of inkjet nozzles for printing one ink color formed by adjacent inkjet nozzle rows of adjacent integrated circuits, each integrated circuit having a different number of inkjet nozzles in said inkjet nozzle rows; and
a controller configured to transfer print data to each of the integrated circuits at a rate proportional to the relative number of inkjet nozzles so that the print data is transferred to each of the integrated circuits in equal time.
2. A system as claimed in claim 1 , wherein the print data transfer rate is controlled by at least one register.
3. A system as claimed in claim 1 , configured to vary the print data transfer rate between 0 to 100% of maximum capacity.
4. A system as claimed in claim 1 , wherein the controller comprises an interface in communication with a line loader unit.
5. A system as claimed in claim 4 , wherein the interface transfers the print data to the integrated circuits at a pre-programmed rate.
6. A system as claimed in claim 4 , wherein the interface accepts two streams of dot data from the line loader unit.
7. A system as claimed in claim 6 , wherein the line loader unit includes two print data generator units.
8. A system as claimed in claim 4 , wherein the line loader unit compensates for any misalignment between the integrated circuits.
9. A system as claimed in claim 4 , wherein the line loader unit generates print data at a rate of at least 12 bits per system clock period.
10. A system as claimed in claim 1 , wherein the print data is transferred to either the integrated circuits from a memory under the control of the controller.