IP Library Granted Patent US 8,225,264
Granted Patent B2
US 8,225,264 · App. 12/583,545 · Granted Jul 17, 2012

Method and system for the modular design and layout of integrated circuits

Assignee: Active-Semi, Inc.
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Quick Facts
Patent No.
US 8,225,264
App. No.
12/583,545
Granted
Jul 17, 2012
Kind
B2
Abstract

An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter.

Claims (26)

1. A modular integrated circuit (IC) device, comprising:

fixed size modular tiles; and

a standardized set of connectors that communicatively interconnect said modular tiles, wherein first portions of said standardized set of connectors are disposed at fixed locations on edges of a first plurality of said modular tiles, wherein second portions of said standardized set of connectors are disposed at the fixed locations on edges of a second plurality of said modular tiles, and wherein said first portions of said standardized set of connectors align and interconnect with said second portions of said standardized set of connectors regardless of which edges of said first plurality of modular tiles are placed adjacent to any edges of said second plurality of modular tiles.

2. The IC device of claim 1 , wherein one of said standardized set of connectors is taken from the group consisting of: a dedicated signal line, an uncommitted bi-directional signal line, a communication signal line, a control signal line, and a power supply line.

3. The IC device of claim 2 , wherein at least one of said modular tiles is configured to selectively claim operable control over said uncommitted bi-directional signal line, wherein the uncommitted bi-directional signal line is operable for a function, wherein the function is taken from the group consisting of: inter-tile communication, inter-tile control, and power supply.

4. The IC device of claim 2 , wherein at least one of said modular tiles is an interface configured modular tile, wherein the interface configured modular tile includes interfacing circuitry operable to properly interface said interface configured modular tile to said standardized set of connectors.

5. The IC device of claim 1 , wherein at least one of said modular tiles includes a memory storage device.

6. The IC device of claim 5 , wherein said memory storage device includes memory of a type taken from the group consisting of:

volatile memory and non-volatile memory.

7. The IC device of claim 5 , wherein said memory storage device of at least one of said modular tiles is configured to be uniquely addressable.

8. The IC device of claim 5 , wherein said IC device is configured to address said memory storage device and transfer data to and from said memory storage device using the same signal line of said standardized set of connectors.

9. The IC device of claim 5 , wherein at least one of said modular tiles is configured to control an electrical and/or performance characteristic based at least in part on its associated memory storage device.

10. The IC device of claim 1 , wherein at least one of said modular tiles is configured to be uniquely addressable.

11. The IC device of claim 1 , wherein at least one of said modular tiles is configured to convert or regulate power.

12. The IC device of claim 1 , wherein a plurality of said modular tiles are properly interconnected to be operable to perform a function taken from the group consisting of: joint power conversion and joint power regulation.

13. The IC device of claim 1 , wherein at least one of said modular tiles is configured to generate a signal operable for use by at least one other of said modular tiles, wherein the signal is taken from the group consisting of: a voltage reference and a clock signal.

14. The IC device of claim 1 , wherein at least one of said modular tiles is configured as an inter-tile master controller unit operable for configuring said modular tiles to cooperate usefully with one another based on a programmable parameter, wherein said programmable parameter is operable to reconfigure said modular tiles into a desired cooperating configuration.

15. The IC device of claim 1 , further comprising:

at least two modular tiles operable together as a single buck-boost converter and operable separately as two separate Direct Current to Direct Current (DC-DC) converters.

16. An apparatus comprising:

an integrated circuit (IC) that includes a first modular tile and a second modular tile, wherein each of the first modular tile and the second modular tile is a fixed size; and

a standardized set of connectors that includes a first portion and a second portion, wherein the first portion is disposed along an edge of the first modular tile at a fixed location and the second portion is disposed along an edge of the second modular tile at a fixed location, and wherein the first portion and the second portion facilitate alignment and communicatively interconnect the first modular tile and the second modular tile when the first modular tile and the second modular tile are disposed adjacent one another regardless of which edge of the first modular tile is placed adjacent to any edge of the second modular tile.

17. The apparatus of claim 16 , wherein the first modular tile includes a first dimension aligned with a first direction and a second dimension aligned with a second direction, wherein the first direction is perpendicular to the second direction, and wherein the fixed size in the first dimension is equal to a first integer multiple of a length value and in the second dimension is equal to a second integer multiple of the length value.

18. The apparatus of claim 16 , wherein the first portion includes a dedicated signal line, an uncommitted bi-directional signal line, a communication signal line, a control signal line, and a power supply line.

19. The apparatus of claim 18 , wherein the first modular tile is configured to selectively claim operable control over the uncommitted bi-directional signal line, and wherein the uncommitted bi-directional signal line is operable for inter-tile communication and control.

20. The apparatus of claim 16 , wherein the first modular tile is configured to generate a clock signal useable by the second modular tile.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2025
From: ACTIVE-SEMI (BVI), INC.
To: QORVO INTERNATIONAL PTE. LTD.
Reel/Frame 070478/0096 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 23408 FRAME 736. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 4, 2025
From: ACTIVE-SEMI INTERNATIONAL, INC.
To: ACTIVE-SEMI (BVI), INC.
Reel/Frame 070110/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2009
From: ACTIVE-SEMI INTERNATIONAL, INC.
To: ACTIVE-SEMI, INC.
Reel/Frame 023408/0736 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2009
From: HUYNH, STEVEN; KUNST, DAVID
To: ACTIVE-SEMI INTERNATIONAL, INC.
Reel/Frame 023167/0024 →
Continuity (2)
Continuation 11544876 · Oct 7, 2006
Related Publication 20090319959A1 · Dec 24, 2009