IP Library Granted Patent US 8,368,681
Granted Patent B2
US 8,368,681 · App. 12/585,982 · Granted Feb 5, 2013

Image display apparatus and method of driving the image display apparatus

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Quick Facts
Patent No.
US 8,368,681
App. No.
12/585,982
Granted
Feb 5, 2013
Kind
B2
Abstract

The present invention sets a scanning line to which a driving signal for power supply is output to a floating state in an entire period of pauses of threshold voltage correction processing or a partial period thereof.

Claims (25)

1. An image display apparatus comprising:

a display unit in which pixel circuits are arranged in a matrix form;

a signal line driving circuit configured to output a signal line driving signal to a signal line provided in the display unit; and

a scanning line driving circuit configured to output at least a driving signal for power supply and a write signal to a scanning line provided in the display unit, wherein the pixel circuit includes at least:

a light-emitting device;

a driving transistor, a drain thereof being configured to receive the driving signal for power supply to drive the light-emitting device by a driving current in accordance with a gate-source voltage;

a holding capacitor configured to hold the gate-source voltage; and

a write transistor configured to connect a gate of the driving transistor to the signal line by the write signal to set a terminal voltage of the holding capacitor to a voltage of the signal line, and wherein:

the light-emitting device is configured to alternately repeat a period of emission and a period of non-emission during which light emission by the light-emitting device is stopped by output signals of the signal line driving circuit and the scanning line driving circuit,

the pixel circuit, in the period of non-emission and after an inter-terminal voltage of the holding capacitor is set to a voltage equal to or higher than a threshold voltage of the driving transistor,

the driving transistor is configured to supply the inter-terminal voltage of the holding capacitor in a plurality of periods sandwiching a pause therebetween to set the inter-terminal voltage of the holding capacitor to the threshold voltage of the driving transistor and then,

the write transistor is configured to the terminal voltage of the holding capacitor to set a gradation of the light-emitting device in a subsequent period of emission, and

the scanning line driving circuit is configured to set the scanning line, to which the driving signal for power supply is output, to a floating state in an entire period of the pauses or a partial period thereof.

2. The image display apparatus according to claim 1 , wherein

a plurality of the corresponding pauses is provided for one gradation setting of the light-emitting device, and

the partial period is a first period of the plurality of pauses.

3. The image display apparatus according to claim 1 , wherein

the scanning line driving circuit causes the voltage of the driving signal for power supply to fall to a voltage equal to or lower than a voltage on a side opposite to the driving transistor of the light-emitting device in the period of non-emission, and

the pixel circuit causes the voltage on the side of the light-emitting device of the holding capacitor to fall with the fall of the voltage of the driving signal for power supply to set the inter-terminal voltage of the holding capacitor to a voltage equal to or higher than the threshold voltage of the driving transistor.

4. A method of driving an image display apparatus comprising a display unit in which pixel circuits are arranged in a matrix form, a signal line driving circuit that outputs a signal line driving signal to a signal line provided in the display unit; and a scanning line driving circuit that outputs at least a driving signal for power supply and a write signal to a scanning line provided in the display unit, wherein the pixel circuit includes at least a light-emitting device; a driving transistor, to a drain of which the driving signal for power supply is applied to drive by current the light-emitting device by a driving current in accordance with a gate-source voltage a holding capacitor that holds the gate-source voltage; and a write transistor that connects a gate of the driving transistor to the signal line by the write signal to set a terminal voltage of the holding capacitor to a voltage of the signal line, and the driving method comprising:

alternately repeating a period of emission during which the light-emitting device is caused to emit light and a period of non-emission during which light emission by the light-emitting device is stopped by output signals of the signal line driving circuit and the scanning line driving circuit,

setting an inter-terminal voltage of the holding capacitor to a voltage equal to or higher than a threshold voltage of the driving transistor in the period of non-emission;

discharging the inter-terminal voltage of the holding capacitor via the driving transistor in a plurality of periods sandwiching a pause therebetween to set the inter-terminal voltage of the holding capacitor to the threshold voltage of the driving transistor in the period of non-emission; and

setting the terminal voltage of the holding capacitor via the write transistor to set a gradation of the light-emitting device in a subsequent period of emission in the period of non-emission, and

setting the scanning line to which the driving signal for power supply is output to a floating state in an entire period of the pauses or a partial period thereof.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2009
From: YAMASHITA, JUNICHI; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 023351/0381 →