Apparatus for dynamically configurable interleaver scheme using at least one dynamically changeable interleaving parameter

1. An apparatus for encrypting and decrypting an original data stream comprising:

a key including a key-algorithm, said key-algorithm is configured to describe an evolution in time of at least one interleaving parameter; said at least one interleaving parameter being dynamically changed during data transmission through a communication channel according to said key-algorithm; wherein said at least one dynamically changeable interleaving parameter is selected from the group consisting of: {a variable branch number; and a variable register depth}; wherein said variable branch number is a first interleaving parameter being dynamically changed during data transmission through said communication channel; and wherein said variable register depth is a second interleaving parameter being dynamically changed during data transmission through said communication channel;

an interleaver having said at least one dynamically changeable interleaving parameter; said interleaver configured to interleave said original data stream; wherein said interleaved data stream propagates through said communication channel; and wherein said interleaver compensates for a change in latency caused by said at least one dynamically changeable interleaving parameter;

and

a de-interleaver adapted to communicate with said communication channel; wherein said de-interleaver includes said at least one said dynamically changeable interleaving parameter; wherein said de-interleaver is configured to recover said original stream of data; wherein said de-interleaver compensates for a change in latency caused by at least one dynamically changeable interleaving parameter.

2. The apparatus of claim 1 , wherein said key further comprises:

a Pseudo-Random Binary sequence (PRBS) generator configured to generate a PRBS key.

3. The apparatus of claim 1 , wherein said key further comprises:

an n-bit sequential counter.

4. The apparatus of claim 1 , wherein said interleaver further comprises:

an anticipator block configured to compensate for latency decrease caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

5. The apparatus of claim 1 , wherein said interleaver further comprises:

a data transition block configured to insert a set of sacrificial data into said data stream.

6. The apparatus of claim 1 , wherein said interleaver further comprises:

a compensator block configured to compensate for latency increase caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

7. The apparatus of claim 1 , wherein said interleaver further comprises:

a data transition block configured to delete a set of dummy bytes inserted into said data stream.

8. The apparatus of claim 1 , wherein said de-interleaver further comprises:

an anticipator block configured to compensate for latency decrease caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

9. The apparatus of claim 1 , wherein said de-interleaver further comprises:

a data transition block configured to insert a set of sacrificial data into said data stream.

10. The apparatus of claim 1 , wherein said de-interleaver further comprises:

a compensator block configured to compensate for latency increase caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

11. The apparatus of claim 1 , wherein said de-interleaver further comprises:

a data transition block configured to delete a set of dummy bytes inserted into said data stream.

12. An apparatus for encrypting and decrypting an original data stream comprising:

a key including a key-algorithm, said key-algorithm is configured to describe an evolution in time of at least one interleaving parameter; said at least one interleaving parameter being dynamically changed during data transmission through a communication channel according to said key-algorithm; wherein said at least one dynamically changeable interleaving parameter is selected from the group consisting of: {a variable branch number; and a variable register depth}; wherein said variable branch number is a first interleaving parameter being dynamically changed during data transmission through said communication channel; and wherein said variable register depth is a second interleaving parameter being dynamically changed during data transmission through said communication channel;

and

an interleaver having said at least one dynamically changeable interleaving parameter; said interleaver configured to interleave said original data stream; wherein said interleaved data stream propagates through said communication channel; and wherein said interleaver compensates for a change in latency caused by said at least one dynamically changeable interleaving parameter; wherein a de-interleaver is adapted to communicate with said communication channel; wherein said de-interleaver includes said at least one said dynamically changeable interleaving parameter; wherein said de-interleaver is configured to recover said original stream of data; wherein said de-interleaver compensates for a change in latency caused by said at least one dynamically changeable interleaving parameter.

13. The apparatus of claim 12 , wherein said key further comprises:

a Pseudo-Random Binary sequence (PRBS) generator configured to generate a PRBS key.

14. The apparatus of claim 12 , wherein said key further comprises:

an n-bit sequential counter.

15. The apparatus of claim 12 , wherein said interleaver further comprises:

an anticipator block configured to compensate for latency decrease caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

16. The apparatus of claim 12 , wherein said interleaver further comprises:

a data transition block configured to insert a set of sacrificial data into said data stream.

17. The apparatus of claim 12 , wherein said interleaver further comprises:

a compensator block configured to compensate for latency increase caused by at least one dynamically changeable interleaving parameter change in said at least one interleaving parameter.

18. The apparatus of claim 12 , wherein said interleaver further comprises:

a data transition block configured to delete a set of dummy bytes inserted into said data stream.