Group III-V semiconductor device with strain-relieving interlayers
View Patent ↗According to one exemplary embodiment, a group III-V semiconductor device includes at least one transition layer situated over a substrate. The group III-V semiconductor device further includes a first strain-relieving interlayer situated over the at least one transition layer and a second strain-relieving interlayer situated over the first strain-relieving interlayer. The group III-V semiconductor device further includes a first group III-V semiconductor body situated over the second strain-relieving interlayer. The first and second strain-relieving interlayers comprise different semiconductor materials so as to reduce a strain in the first group III-V semiconductor body. The second strain-relieving interlayer can be substantially thinner than the first strain-relieving interlayer.
1. A group III-V semiconductor device comprising:
at least one transition layer situated over a substrate;
a first strain-relieving interlayer situated over said at least one transition layer and a second strain-relieving interlayer situated over said first strain-relieving interlayer;
a first group III-V semiconductor body situated over said second strain-relieving interlayer, said first group III-V semiconductor body substantially thicker than said first and second strain-relieving interlayers;
said first and second strain-relieving interlayers comprising different semiconductor materials so as to reduce a strain in said first group III-V semiconductor body;
said first strain-relieving interlayer at least five times thicker than said second strain-relieving interlayer;
said second strain-relieving interlayer being an aluminum nitride (AlN) layer.
2. The group III-V semiconductor device of claim 1 further comprising a buffer layer disposed between said substrate and said at least one transition layer.
3. The group III-V semiconductor device of claim 1 , wherein said first strain-relieving interlayer comprises gallium nitride (GaN).
4. The group III-V semiconductor device of claim 1 , wherein said first strain-relieving interlayer has a thickness of from approximately 0.2 microns to approximately 0.5 microns.
5. The group III-V semiconductor device of claim 1 , wherein said second strain-relieving interlayer has a thickness of from approximately 0.01 microns to approximately 0.04 microns.
6. The group III-V semiconductor device of claim 1 , wherein said at least one transition layer comprises a first transition layer of aluminum gallium nitride (AlGaN) and a second transition layer of aluminum gallium nitride (AlGaN), wherein said second transition layer has a lower aluminum composition than said first transition layer.
7. The group III-V semiconductor device of claim 1 , wherein said first group III-V semiconductor body has a thickness of from approximately 0.6 microns to approximately 5.0 microns.
8. The group III-V semiconductor device of claim 1 further comprising a second group III-V semiconductor body situated over said first group III-V semiconductor body, wherein a two-dimensional electron gas (2DEG) forms at a heterojunction of said first and second group III-V semiconductor bodies.
9. A method for forming a group III-V semiconductor device over a substrate, said method comprising:
forming at least one transition layer situated over said substrate;
forming a first strain-relieving interlayer over said at least one transition layer and a second strain-relieving interlayer over said first strain-relieving interlayer;
forming a first group III-V semiconductor body over said second strain-relieving interlayer, said first group III-V semiconductor body substantially thicker than said first and second strain-relieving interlayers;
said first and second strain-relieving interlayers comprising different semiconductor materials so as to reduce a strain in said first group III-V semiconductor body;
said first strain-relieving interlayer at least five times thicker than said second strain-relieving interlayer;
said second strain-relieving interlayer being an aluminum nitride (AlN) layer.
10. The method of claim 9 further comprising forming a buffer layer over said substrate prior to forming said at least one transition layer.
11. The method of claim 9 , wherein said first strain-relieving interlayer comprises gallium nitride (GaN).
12. The method of claim 9 , wherein said first strain-relieving interlayer has a thickness of from approximately 0.2 microns to approximately 0.5 microns.
13. The method of claim 9 , wherein said second strain-relieving interlayer has a thickness of from approximately 0.01 microns to approximately 0.04 microns.
14. The method of claim 9 , wherein said at least one transition layer comprises a first transition layer of aluminum gallium nitride (AlGaN) and a second transition layer of aluminum gallium nitride (AlGaN), wherein said second transition layer has a lower aluminum composition than said first transition layer.
15. The method of claim 9 , wherein said first group III-V semiconductor body has a thickness of from approximately 0.6 microns to approximately 5.0 microns.
16. The method of claim 9 further comprising forming a second group III-V semiconductor body over said first group III-V semiconductor body, wherein a two-dimensional electron gas (2DEG) is formed at a heterojunction of said first and second group III-V semiconductor bodies.