IP Library Granted Patent US 8,345,456
Granted Patent B2
US 8,345,456 · App. 12/591,056 · Granted Jan 1, 2013

Control system of a power factor correction circuit

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Quick Facts
Patent No.
US 8,345,456
App. No.
12/591,056
Granted
Jan 1, 2013
Kind
B2
Abstract

A control system for a power factor correction circuit performs stabilized oscillation operation and suppresses switching frequency variation due to change of the AC power source. A control system includes a voltage error amplifier for outputting a voltage error signal obtained by amplifying a difference between a DC output voltage Vo and a command value Vref of the DC output voltage, a current command value generating circuit for outputting a current command value Vi for controlling the input current Iin, a comparator comparing an inductor current signal obtained by detecting an inductor current running in the switching element by a current detecting resistor with a magnitude of the output signal Vi from the multiplier, a timer circuit for setting an off-period of the switching element corresponding to the voltage Vd, and a reset-set type flip-flop circuit for setting an off-timing of the switching element after an elapse of the off-period.

Claims (15)

1. A control system and a power factor correction circuit, comprising:

a rectifier bridge for full-wave rectification of an AC power source voltage;

a booster circuit including an inductor, a switching element, a rectifying unit, and a capacitor, the booster circuit being connected to an output side of the rectifier bridge, the switching element, or the switching element and the rectifying unit, the booster circuit controlling an input current from the AC power source by an on-off operation to have a sinusoidal waveform;

a voltage error amplifier outputting a voltage error signal obtained by amplifying a difference between a DC output voltage or a divided voltage thereof from the booster circuit and a reference voltage;

a current command value generating circuit outputting a signal for controlling an AC input current to have a sinusoidal waveform according to the voltage error signal and an output voltage from the rectifier bridge;

a comparator comparing a magnitude of an inductor current signal obtained by detecting a current running in the inductor with a magnitude of an output signal from the current command value generating circuit;

a timer circuit setting an off-period of the switching element, the off-period being generated in proportion to a peak value or an average value of the output voltage out of the rectifier bridge, or an effective value of the AC power source, the timer circuit comprising a peak holding circuit that conducts peak holding at a maximum of at least a portion of an output voltage of the rectifier bridge and outputs a corresponding peak holding value; and

a reset-set type flip-flop circuit that sets an on-timing of the switching element after the off-period set by the timer circuit, and that sets an off-timing of the switching element when the output signal of the comparator detects that the inductor current signal has reached the output signal of the current command value generating circuit.

2. The control system and power factor correction circuit according to claim 1 , wherein the timer circuit comprises a maximum frequency limiting circuit that limits the maximum value of the switching frequency of the switching element.

3. The control system and power factor correction circuit according to claim 2 , wherein the timer circuit comprises a minimum frequency limiting circuit that limits the minimum value of the switching frequency of the switching element.

4. The control system and power factor correction circuit according to claim 1 , the timer circuit further comprising a capacitor charged with a voltage, and a comparator that compares the peak holding value with the capacitor voltage, wherein the timer circuit outputs, to the reset-set type flip-flop circuit, a setting pulse corresponding to the off-period of the switching element based on an output of the comparator that compares the peak holding value with the capacitor voltage.

5. The control system and power factor correction circuit according to claim 1 , wherein the power factor correction circuit comprises the rectifier bridge and the booster circuit.

6. The control system and power factor correction circuit according to claim 1 , wherein the control system comprises the voltage error amplifier, the current command value generating circuit, the comparator, the timer circuit, and the reset-set type flip-flop circuit.

7. The control system and power factor correction circuit according to claim 1 , wherein the rectifying unit is a diode.

8. The control system and power factor correction circuit according to claim 1 , wherein the rectifying unit is a synchronous rectifying switching element.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2009
From: NISHIKAWA, YUKIHIRO
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 023737/0193 →