IP Library Granted Patent US 7,829,935
Granted Patent B2
US 7,829,935 · App. 12/600,986 · Granted Nov 9, 2010

Semiconductor memory, semiconductor memory system using the memory, and method for manufacturing quantum dot used in semiconductor memory

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Quick Facts
Patent No.
US 7,829,935
App. No.
12/600,986
Granted
Nov 9, 2010
Kind
B2
Abstract

A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.

Claims (47)

1. A semiconductor memory having a floating gate structure, comprising:

a charge storage node including first quantum dots and storing electrons; and

a control node including second quantum dots, injecting electrons to the charge storage node and emitting the electron from the charge storage node;

wherein each of the first quantum dots includes a core layer and a clad layer which covers the core layer; and

the electron occupied level in the core layer is lower than that in the clad layer.

2. The semiconductor memory according to claim 1 , wherein the control node includes first and second control nodes, and the charge storage node is laminated between the first and second control nodes.

3. The semiconductor memory according to claim 2 ,

wherein the charge storage node includes the first quantum dots and a first coating material which covers the first quantum dots;

the control node includes the second quantum dots and a second coating material which covers the second quantum dots;

the first quantum dots are composed of a material different from that of the second quantum dots; and

the first coating material is different from the second coating material.

4. The semiconductor memory according to claim 3 ,

wherein the core layer of each of the first quantum dots is composed of a compound of a metal and a semiconductor;

the clad layer of each of the first quantum dots is composed of a semiconductor; and

the second quantum dots are composed of a metal silicide.

5. The semiconductor memory according to claim 4 ,

wherein the core layer is composed of a metal silicide of silicon and a metal; and

the clad layer is composed of silicon.

6. The semiconductor memory according to claim 5 , wherein the metal is nickel or tungsten.

7. The semiconductor memory according to claim 4 ,

wherein the core layer is composed of a compound of germanium and a metal; and

the clad layer is composed of germanium.

8. The semiconductor memory according to claim 7 , wherein the metal is nickel or tungsten.

9. The semiconductor memory according to claim 1 ,

wherein the charge storage node includes the first quantum dots and a first coating material which covers the first quantum dots;

the control node includes the second quantum dots and a second coating material which covers the second quantum dots;

the first quantum dots are composed of a material different from that of the second quantum dots; and

the first coating material is different from the second coating material.

10. A semiconductor memory system comprising:

a semiconductor memory having a floating gate structure; and

a light source irradiating to the semiconductor memory with light;

wherein the semiconductor memory includes:

a floating gate including a charge storage node which includes first quantum dots and stores electrons and a control node which includes second quantum dots and injects electrons to the charge storage node and emits the electron from the charge storage node; and

a transmissive gate electrode leading light emitted from the light source to the charge storage node;

the first quantum dots each include a core layer and a clad layer which covers the core layer; and

the electron occupied level in the core layer is lower than that in the clad layer.

11. A method for manufacturing quantum dots used in a semiconductor memory having a floating gate structure, the method comprising:

a first step of forming an oxide film on a semiconductor substrate;

a second step of forming first quantum dots on the oxide film;

a third step of depositing second quantum dots on the first quantum dots;

a fourth step of depositing a metal thin film on the second quantum dots;

a fifth step of performing heat treatment or remote hydrogen plasma treatment of the second quantum dots and the metal thin films; and

a sixth step of depositing third quantum dots on a compound of the second quantum dots and the metal thin film, the compound being produced in the fifth step;

wherein the electron occupied level in the compound is lower than that in the first and third quantum dots.

12. The method for manufacturing quantum dots according to claim 11 , wherein in the fifth step, the remote hydrogen plasma treatment is performed under a condition in which the semiconductor substrate is electrically floated.

13. The method for manufacturing quantum dots according to claim 11 , wherein in the fourth step, metal thin films having larger electron affinity than that of the semiconductor substrate are deposited on the second quantum dots.

14. The method for manufacturing quantum dots according to claim 13 , wherein the semiconductor substrate is composed of silicon; and the metal thin films include nickel thin films or tungsten thin films.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jul 31, 2019
From: CRESTLINE DIRECT FINANCE, L.P.
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 049924/0794 →
SECURITY INTEREST Recorded Jan 29, 2019
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: CRESTLINE DIRECT FINANCE, L.P.
Reel/Frame 048373/0217 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2010
From: MAKIHARA, KATSUNORI; MIYAZAKI, SEIICHI; HIGASHI, SEIICHIRO
To: HIROSHIMA UNIVERSITY
Reel/Frame 024604/0927 →