Methods and apparatus for reducing a sampling rate during a sampling phase determination process

1. A method for use in a receiver, the method comprising:

in a sampling phase determination process for the receiver:

sampling, in the receiver, a signal at a sampling period of T±T/n for producing a sample set for each one of n phases of the sampled signal, where T is a symbol or chip period of the signal and n is a number of phases of the sampled signal where n≧4; and

for each sample set, performing a correlation process between the sample set and a pseudorandom noise (PN) sequence for thereby producing a correlation result;

identifying, from the correlation results, one of the phases associated with an optimal correlation result; and

in a communication mode of the receiver:

sampling, in the receiver, a received signal at a sampling period of T at the phase associated with the optimal correlation result, for use in recovering user or signaling information from the received signal.

2. The method of claim 1 , wherein the receiver comprises a direct sequence spread spectrum (DSSS) receiver and the received signal comprises a DSSS signal.

3. The method of claim 1 , further comprising:

wherein the act of sampling the signal at the sampling period of T±T/n comprises sampling the received signal during a first time period; and

wherein the act of sampling the received signal at the sampling period of T comprises sampling during a second time period following the first time period.

4. The method of claim 1 , further comprising:

wherein the act of sampling the signal at the sampling period of T±T/n comprises sampling with a first analog-to-digital converter; and

wherein the act of sampling the received signal at the sampling period of T comprises sampling with use of a second analog-to-digital converter.

5. The method of claim 1 , further comprising:

performing a first downsampling process to produce the sample set for each one of the n phases of the sampled signal; and

performing a second downsampling process to produce the PN sequence for each correlation process associated with the sample sets.

6. The method of claim 1 , wherein n=4, 8, or 16.

7. An electronic circuit comprising:

control circuitry;

an analog-to-digital converter which includes a sampler;

the control circuitry being configured to control the sampler, in a sampling phase determination process, to sample a signal at a sampling period of T±T/n, where T is a symbol or chip period of the signal and n is the number of phases of the sampled signal where n≧4, for outputting a sample set for each one of n phases of the sampled signal;

a pseudorandom noise (PN) generator configured to produce a PN signal;

a plurality of n correlators, each correlator having:

a first input configured to receive one of the sample sets associated with a corresponding one of the n phases of the sampled signal;

a second input configured to receive the PN signal;

an output which provides a correlation result from a correlation process between the sample set and the PN signal; and

the control circuitry being further configured to identify, from the correlation results, one of the phases associated with an optimal correlation result; and

the control circuitry being further configured to control the sampler, in a communication mode, to sample a received signal at a sampling period of T at the phase associated with the optimal correlation result, for use in recovering user or signaling information from the received signal.

8. The electronic circuit of claim 7 , wherein the received signal comprises a direct sequence spread spectrum (DSSS) signal.

9. The electronic circuit of claim 7 , wherein the control circuitry is further configured to cause the sampler to sample the signal at the sampling period of T±T/n during a first time period and sample the received signal at the sampling period of T during a second time period following the first time period.

10. The electronic circuit of claim 7 , wherein n=4, 8, or 16.

11. The electronic circuit of claim 7 , further comprising:

a first plurality of n downsamplers coupled to the output from the sampler to produce the sample set for each one of the n phases of the sampled signal; and

a second plurality of n downsamplers to produce the PN signal for each one of the plurality of n correlators.

12. The electronic circuit of claim 7 , wherein the sampler is a first sampler and the electronic circuit further comprises:

a second sampler; and

the control circuitry being configured to control the second sampler, in the communication mode, to sample the received signal at the sampling period of T at the phase associated with the optimal correlation result, for use in recovering the user or signaling information from the received signal.

13. A communication device, comprising:

a wireless receiver;

a frequency synthesizer of the wireless receiver;

control circuitry coupled to the frequency synthesizer;

an analog-to-digital converter which includes:

a sampler;

a clock input coupled to a clock output of the frequency synthesizer;

the control circuitry being configured to set the frequency synthesizer, in a sampling phase determination process, to produce a clock signal at the clock output so that the sampler samples a signal at a sampling period of T±T/n, where T is a symbol or chip period of the signal and n is the number of phases of the sampled signal where n≧4, for outputting a sample set for each one of n phases of the sampled signal;

a pseudorandom noise (PN) generator configured to produce a PN signal;

a plurality of n correlators, each correlator having:

a first input configured to receive one of the sample sets associated with a corresponding one of the n phases of the sampled signal;

a second input configured to receive the PN signal;

an output which provides a correlation result from a correlation process between the sample set and the PN signal;

the control circuitry being further configured to identify, from the correlation results, one of the phases associated with the an optimal correlation result; and

the control circuitry being further configured to set the frequency synthesizer, in a communication mode, to produce a clock signal at the clock output so that the sampler samples a received signal at a sampling period of T at the phase associated with the optimal correlation result, for use in recovering user or signaling information from the received signal.

14. The communication device of claim 13 , wherein the received signal comprises a direct sequence spread spectrum (DSSS) signal.

15. The communication device of claim 13 , wherein n=4, 8, or 16.

16. The communication device of claim 13 , wherein the sampler is set to sample the signal at the sampling period of T±T/n during a first time period and set to sample the received signal at the sampling period of T during a second time period following the first time period.

17. The communication device of claim 13 , further comprising:

a first plurality of n downsamplers coupled to the output from the analog-to-digital converter to produce the sample set for each one of the n phases of the sampled signal; and

a second plurality of n downsamplers to produce the PN signal for each one of the plurality of n correlators.

18. The communication device of claim 13 , wherein the wireless receiver is configured for communications in a wireless communication network and the received signal is a signal from the wireless communication network.

19. The communication device of claim 13 , comprising a mobile station.

20. The communication device of claim 13 , wherein the sampler is a first sampler and the communication device further comprises:

a second sampler; and

the control circuitry being configured to control the second sampler, in the communication mode, to sample the received signal at the sampling period of T at the phase associated with the optimal correlation result, for use in recovering the user or signaling information from the received signal.