Semiconductor device with protective screen
View Patent ↗A multi-layer substrate has a front face with external pads. An integrated-circuit chip is positioned inside of the multi-layer substrate. An electronic and/or electric component is also positioned inside of the substrate above the integrated-circuit chip. An electrical connection network is formed in the multi-layer substrate to selectively connect the integrated-circuit chip and component together and to the external pads. A first screen is positioned within the multi-layer substrate between the integrated-circuit chip and the electrical connection network, this first screen being connected by vias to the external pads. A second screen is position on a top (external) surface of the multi-layer substrate above the component and electrical connection network, this second screen being connected by vias to the external pads. The integrated-circuit chip is position to be inside the first and second screens.
1. A semiconductor device, comprising:
a substrate having a bottom face on which are formed a plurality of external electrical connection pads;
at least one integrated-circuit chip installed inside the substrate;
at least one electronic and/or electric component also installed inside the substrate at a position above the chip;
wherein the substrate comprises an electrical connection network selectively connecting the chip, the component and first ones of the electrical connection pads on the bottom face;
at least one screen comprising a portion substantially parallel to the bottom face and a plurality of electrical connection vias connecting this portion to second ones of the electrical connection pads on the bottom face;
wherein the chip is surrounded by the plurality of electrical connection vias of the screen;
wherein the at least one screen comprises:
a first screen made of an electrically conductive material and comprising a first portion extending between the chip and the component and a plurality of first electrical connection vias connecting this first portion to a first plurality of the second ones of the electrical connection pads, this plurality of first vias being placed around the periphery of the chip; and
a second screen made of electrically conductive material and comprising a second portion positioned above the component and a plurality of second electrical connection vias connecting this second portion to a second plurality of the second ones of the electrical connection pads, this plurality of second vias being placed around and at a distance from the plurality of first vias.
2. The device according to claim 1 , wherein the first and second screens are electrically insulated relative to the chip, component and electrical connection network.
3. The device according to claim 1 , wherein the portion of the at least one screen substantially parallel to the bottom face comprises one of a board or a layer.
4. The device according to claim 1 , wherein the first portion of the first screen comprises a board or layer.
5. The device according to claim 1 , wherein the electrical connection network comprises a first network formed between the first screen and the second screen and a second network formed between the chip and the bottom face.
6. The device according to claim 1 , wherein the second screen is formed on the periphery of the substrate.
7. The device according to claim 1 , wherein the second portion of the second screen comprises a board or layer.
8. The device according to claim 1 , wherein the second portion of the second screen is formed on a top face of the substrate.
9. The device according to claim 1 , wherein the first screen and the second screen are electrically insulated relative to one another.
10. The device according to claim 1 , wherein the substrate is formed of layers of electrically nonconductive resin; and wherein the chip, the component and the electrical connection network are integrated into at least certain ones of the layers of resin.
11. The device according to claim 1 wherein the chip comprises one of a radio frequency transmitter and receiver circuit.
12. An assembly, comprising:
a semiconductor device comprising:
a substrate having a bottom face on which are formed a plurality of external electrical connection pads;
at least one integrated-circuit chip installed inside the substrate;
at least one electronic and/or electric component also installed inside the substrate at a position above the chip;
wherein the substrate comprises an electrical connection network selectively connecting the chip, the component and first ones of the electrical connection pads on the bottom face;
at least one screen comprising a portion substantially parallel to the bottom face and a plurality of electrical connection vias connecting this portion to second ones of the electrical connection pads on the bottom face;
wherein the chip is surrounded by the plurality of electrical connection vias of the screen;
wherein the at least one screen comprises:
a first screen made of an electrically conductive material and comprising a first portion extending between the chip and the component and a plurality of first electrical connection vias connecting this first portion to a first plurality of the second ones of the electrical connection pads, this plurality of first vias being placed around the periphery of the chip; and
a second screen made of electrically conductive material and comprising a second portion positioned above the component and a plurality of second electrical connection vias connecting this second portion to a second plurality of the second ones of the electrical connection pads, this plurality of second vias being placed around and at a distance from the plurality of first vias;
a printed circuit board wherein the external electrical connection pads of the semiconductor device are connected to pads of the printed circuit board by electrical connections; and
wherein the second ones of the electrical connection pads of the semiconductor device are connected to pads of the printed circuit board adapted for connection to a fixed ground potential.
13. The assembly according to claim 12 wherein the chip comprises one of a radio frequency transmitter and receiver circuit.