IP Library Granted Patent US 8,319,505
Granted Patent B1
US 8,319,505 · App. 12/606,147 · Granted Nov 27, 2012

Methods and circuits for measuring mutual and self capacitance

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Quick Facts
Patent No.
US 8,319,505
App. No.
12/606,147
Granted
Nov 27, 2012
Kind
B1
Abstract

Capacitance measurement circuits for measuring self and mutual capacitances are described. In one embodiment the capacitance measurement circuit includes: a first electrode capacitively coupled with a second electrode; a first plurality of switches coupled with the first electrode; and a second plurality of switches coupled with the second electrode, wherein, during a first operation stage, the first plurality of switches is configured to apply a first initial voltage to the first electrode and the second plurality of switches is configured to apply a second initial voltage to the second electrode, and wherein, during a second operation stage, the first plurality of switches is configured to connect the first electrode with a measurement circuit, and the second plurality of switches is configured to connect the second electrode with a constant voltage.

Claims (49)

1. A capacitive measurement circuit, comprising:

a first electrode capacitively coupled with a second electrode;

a first plurality of switches coupled with the first electrode; and

a second plurality of switches coupled with the second electrode, wherein, during a first operation stage, the first plurality of switches is configured to apply a first initial voltage to the first electrode and the second plurality of switches is configured to apply a second initial voltage to the second electrode, and wherein, during a second operation stage, the first plurality of switches is configured to connect the first electrode with a measurement circuit, and the second plurality of switches is configured to connect the second electrode with a constant voltage,

wherein the measurement circuit is configured to generate an output signal based on a current generated by operation of the first plurality of switches, the circuit generating the output signal including a current mirror with a first end and a second end, the first end coupled to the first plurality of switches.

2. The measurement circuit of claim 1 , wherein the circuit generating the output signal based on the current generated by the operation of the first plurality of switches further comprises:

a charge integration circuit coupled to the second end of the current mirror;

a comparator coupled to the charge integration circuit at a first comparator input and a reference voltage on a second comparator input; and

a timer coupled to an output of the comparator.

3. The measurement circuit of claim 2 , wherein an output of the timer is equivalent to the current generated by the operation of the first plurality of switches.

4. The capacitance measurement circuit of claim 1 , wherein the second initial voltage is approximately equal to the first initial voltage.

5. The capacitance measurement circuit of claim 1 , wherein the first initial voltage is approximately equal to a voltage supplied by the measurement circuit to the first electrode during the second operation stage.

6. The capacitance measurement circuit of claim 5 , further comprising a buffer configured to generate the first initial voltage based on the voltage supplied by the measurement circuit.

7. A capacitance measurement method, comprising:

applying a first initial voltage to a first electrode during a first operation stage, wherein the first electrode is capacitively coupled with a second electrode;

applying a second initial voltage to the second electrode during the first operation stage;

connecting the first electrode with a measurement circuit during a second operation stage;

connecting the second electrode to a constant voltage during the second operation stage; and

generating an output signal based on a net current detected by the measurement circuit during the first operation stage and the second operation stage, wherein the output signal is generated by a current mirror coupled to the current detected by the measurement circuit and coupled to a charge integration circuit coupled to a comparator and a timer.

8. The capacitance measurement method of claim 7 , wherein the second initial voltage is approximately equal to the first initial voltage.

9. The capacitance measurement method of claim 7 , wherein the first initial voltage is approximately equal to a voltage supplied by the measurement circuit to the first electrode during the second operation stage.

10. The capacitance measurement method of claim 9 , further comprising buffering the voltage supplied by the measurement circuit to generate the first initial voltage.

11. A capacitance measurement circuit, comprising:

a first electrode capacitively coupled with a second electrode;

a first plurality of switches coupled with the first electrode; and

a second plurality of switches coupled with the second electrode, wherein the first plurality of switches is configured to connect the first electrode with a measurement circuit during a first operation phase and to connect the first electrode to a constant voltage during a second operation phase, and wherein the second plurality of switches is configured to minimize a voltage difference between the second electrode and the first electrode during the first operation phase and during the second operation phase.

12. The capacitance measurement circuit of claim 11 , wherein the measurement circuit is configured to generate an output signal based on a current generated by operation of the first plurality of switches.

13. The measurement circuit of claim 12 , wherein the output signal based on the current generated by the operation of the first plurality of switches is generated by a circuit comprising:

a current mirror with a first end and a second end, the first end coupled to the first plurality of switches;

a charge integration circuit coupled to the second end of the current mirror;

a comparator coupled to the charge integration circuit at a first comparator input and a reference voltage on a second comparator input; and

a timer coupled to an output of the comparator.

14. The measurement circuit of claim 13 , wherein an output of the timer is equivalent to the current generated by the operation of the first plurality of switches.

15. The capacitance measurement circuit of claim 11 , wherein the second plurality of switches is further configured to:

during the first operation phase, connect the second electrode to a voltage approximately equal to a voltage supplied by the measurement circuit to the first electrode; and

during the second operation phase, connect the second electrode to a voltage approximately equal to the constant voltage.

16. The capacitance measurement circuit of claim 15 , further comprising a buffer configured to generate the voltage approximately equal to the voltage supplied by the measurement circuit to the first electrode.

17. The capacitance measurement circuit of claim 11 , wherein the constant voltage is a ground voltage.

18. A capacitance measurement method, comprising:

connecting a first electrode to a measurement circuit during a first operation phase, wherein the first electrode is capacitively coupled to a second electrode;

connecting the first electrode to a constant voltage during a second operation phase; and

minimizing a voltage difference between the second electrode and the first electrode during the first operation phase and the second operation phase.

19. The capacitance measurement method of claim 18 , further comprising generating an output signal based on a net current detected by the measurement circuit during the first operation phase and the second operation phase.

20. The capacitance measurement method of claim 19 , wherein the output signal is generated by a current mirror coupled to the current detected by the measurement circuit and coupled to a charge integration circuit coupled to a comparator and a timer.

21. The capacitance measurement method of claim 18 , wherein minimizing the voltage different comprises:

during the first operation phase, connecting the second electrode to a voltage approximately equal to a voltage supplied by the measurement circuit to the first electrode; and

during the second operation phase, connecting the second electrode to a voltage approximately equal to the constant voltage.

22. The capacitance measurement method of claim 21 , further comprising using a buffer connected to the measurement circuit to generate the voltage approximately equal to the voltage supplied by the measurement circuit to the first electrode.

23. The capacitance measurement method of claim 18 , wherein the constant voltage is a ground voltage.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION
To: PARADE TECHNOLOGIES, LTD.
Reel/Frame 036508/0284 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS AND TRADEMARKS Recorded Aug 4, 2015
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT FOR THE SECURED PARTIES
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036264/0114 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
PATENT SECURITY AGREEMENT Recorded Aug 28, 2012
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 028863/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2010
From: MAHARYTA, ANDRIY
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 023987/0344 →