IP Library Granted Patent US 8,368,047
Granted Patent B2
US 8,368,047 · App. 12/606,880 · Granted Feb 5, 2013

Semiconductor device

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Quick Facts
Patent No.
US 8,368,047
App. No.
12/606,880
Granted
Feb 5, 2013
Kind
B2
Abstract

Semiconductor devices including a light emitting layer, and at least one surface plasmon metal layer in contact with the light emitting layer are provided. The light emitting layer includes an active layer having a first band gap, and one or more barrier layers having a second band gap. The first band gap is smaller than the second band gap. Methods for fabricating semiconductor devices are also provided.

Claims (53)

1. A semiconductor device comprising:

a light emitting layer comprising an active layer having a first band gap, and one or more barrier layers disposed on at least one surface of the active layer, the barrier layers having a second band gap; and

at least one surface plasmon metal layer in contact with the light emitting layer,

wherein the first band gap is smaller than the second band gap,

wherein the at least one surface plasmon metal layer is disposed on at least one lateral surface of the light emitting layer.

2. The semiconductor device of claim 1 , wherein each of the active layer and the one or more barrier layers is composed of a IV group semiconductor material, a IV-IV group compound semiconductor material, a III-V group compound semiconductor material, a II-VI group compound semiconductor material, or a I-VII group compound semiconductor material.

3. The semiconductor device of claim 1 , wherein permittivity of the at least one surface plasmon metal layer is greater than permittivity of the active layer and the one or more barrier layers.

4. The semiconductor device of claim 1 , wherein the at least one surface plasmon metal layer comprises Au, Ag, Cu, or an alloy thereof.

5. A semiconductor device comprising:

a light emitting layer comprising an active layer having a first band gap, and one or more barrier layers disposed on at least one surface of the active layer, the barrier layers having a second band gap;

at least one surface plasmon metal layer in contact with the light emitting layer,

wherein the first band gap is smaller than the second band gap;

a first doped layer disposed on one lateral surface of the light emitting layer; and

a second doped layer disposed on the other lateral surface of the light emitting layer,

wherein the at least one surface plasmon metal layer is disposed on an upper surface of the light emitting layer.

6. The semiconductor device of claim 5 further comprising:

a first electrode disposed on one surface of the first doped layer; and

a second electrode disposed on one surface of the second doped layer.

7. The semiconductor device of claim 5 further comprising a gate electrode, disposed on the upper surface of the light emitting layer and spaced from the at least one surface plasmon metal layer, to apply an electric field to the light emitting layer in order to compensate or cancel out an internal polarization field in the light emitting layer.

8. The semiconductor device of claim 7 , wherein the gate electrode is composed of a transparent conductive material.

9. The semiconductor device of claim 1 ,

wherein the semiconductor device further comprises:

a first doped layer comprising a first portion disposed under both the light emitting layer and the at least one surface plasmon metal layer and a second portion horizontally extended from the first portion; and

a second doped layer disposed on an upper surface of the light emitting layer.

10. The semiconductor device of claim 9 further comprising:

a first electrode partially disposed on the second portion of the first doped layer; and

a second electrode disposed on an upper surface of the second doped layer.

11. The semiconductor device of claim 5 , wherein the first doped layer is n-type doped layer, and the second doped layer is p-type doped layer.

12. The semiconductor device of claim 1 , wherein the active layer comprises at least one of a quantum wire, a quantum dot, and a nanorod.

13. A short-wavelength light-emitter comprising:

a light emitting layer comprising an active layer having a first band gap, and one or more barrier layers disposed on at least one surface of the active layer, the barrier layers having a second band gap;

at least one surface plasmon metal layer in contact with a first surface of the light emitting layer;

an n-type doped layer disposed on a second surface of the light emitting layer; and

a p-type doped layer disposed on a third surface of the light emitting layer,

wherein the first band gap is smaller than the second band gap; and

wherein the second and third surfaces are opposite to each other and the first surface is between the second and third surfaces.

14. The short-wavelength light-emitter of claim 13 further comprising a gate electrode, disposed on the first surface of the light emitting layer and spaced from the at least one surface plasmon metal layer, to apply an electric field to the light emitting layer in order to compensate or cancel out internal polarization field in the light emitting layer.

15. The short-wavelength light-emitter of claim 13 wherein the first, second and third surfaces are an upper surface, one lateral surface and the other lateral surface, respectively.

16. The short-wavelength light-emitter of claim 13 wherein the first, second and third surfaces are a lateral surface, a bottom surface and an upper surface, respectively.

17. A method for fabricating a semiconductor device comprising:

forming an active layer having a first band gap on a substrate;

forming one or more barrier layers having a second band gap on at least one surface of the active layer, the active layer and the one or more barrier layers constituting a light emitting layer;

forming at least one surface plasmon metal layer in contact with the light emitting layer,

forming an n-type doped layer on one lateral surface of the light emitting layer; and

forming a p-type doped layer on the other lateral surface of the light emitting layer,

wherein the at least one surface plasmon metal layer is disposed on an upper surface of the light emitting layer,

wherein the first band gap is smaller than the second band gap.

18. The method of claim 17 , wherein each of the active layer and the at least one barrier layer is composed of a IV group semiconductor material, a IV-IV group compound semiconductor material, a III-V group compound semiconductor material, a II-VI group compound semiconductor material, or a I-VII group compound semiconductor material, and

wherein the at least one surface plasmon metal layer comprises Au, Ag, Cu, or an alloy thereof.

19. The method of claim 17 , wherein at least one of forming the active layer and forming the at least one barrier layer comprises employing radio-frequency (RF) magnetron sputtering, pulsed laser deposition, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy, or radio-frequency plasma-excited molecular beam epitaxy.

20. The method of claim 17 further comprising:

forming a gate electrode on the upper surface of the light emitting layer such that the gate electrode is spaced from the at least one surface plasmon metal layer.

21. The method of claim 20 , wherein the gate electrode is composed of a transparent conductive material.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jul 31, 2019
From: CRESTLINE DIRECT FINANCE, L.P.
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 049924/0794 →
SECURITY INTEREST Recorded Jan 29, 2019
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: CRESTLINE DIRECT FINANCE, L.P.
Reel/Frame 048373/0217 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2009
From: AHN, DOYEOL
To: UNIVERSITY OF SEOUL INDUSTRY COOPERATION FOUNDATION
Reel/Frame 023431/0597 →