Apparatus comprising a brown-out protection circuit for memory devices
View Patent ↗An apparatus and method for regulating an output voltage (V O ) of a voltage regulator during a brown-out condition is described. The apparatus comprises the voltage regulator, a brown-out protection circuit, a switch, and a first capacitor. The voltage regulator charges the first capacitor to the regulated output voltage V O . The brown-out protection circuit is coupled to the voltage regulator and the switch. In operation, the brown-out protection circuit detects the occurrence of an undervoltage condition based on a first undervoltage detection signal received at an undervoltage detection input, the brown-out protection circuit disables the voltage regulator and closes the switch to discharge the first capacitor to below a predetermined voltage level.
1. An apparatus for regulating an output voltage, comprising:
a voltage reference source Vcc;
a first capacitor;
a voltage regulator coupled to the voltage reference source Vcc and the first capacitor to charge the first capacitor to a regulated output voltage (V O );
a switch operably coupled to the voltage regulator, the first capacitor, and to a low voltage sink; and
a brown-out protection circuit coupled to the switch, the brown-out protection circuit comprising a first undervoltage detection input, wherein when the brown-out protection circuit detects an undervoltage condition based on a first undervoltage detection signal received at the first undervoltage detection input, the brown-out protection circuit closes the switch to discharge the first capacitor to below a predetermined voltage level,
wherein the first undervoltage detection signal is generated based on the regulated output voltage (Vo).
2. The apparatus of claim 1 , wherein the brown-out protection circuit comprises a first comparator coupled to the first undervoltage detection input.
3. The apparatus of claim 2 , wherein the brown-out protection circuit comprises a second undervoltage detection input to receive a second undervoltage detection signal.
4. The apparatus of claim 3 , wherein the brown-out protection circuit comprises a diode coupled to the second undervoltage detection input, wherein the second undervoltage detection signal is derived from the voltage reference source Vcc.
5. The apparatus of claim 4 , wherein the brown-out protection circuit further comprises a second comparator coupled with the switch, the second comparator comprising a first input coupled to the diode and a second input coupled to an output of the first comparator.
6. The apparatus of claim 5 , wherein the second comparator closes the switch based on the first and second undervoltage detection signals.
7. The apparatus of claim 5 , wherein the first and second comparators comprise first and second differential operational amplifiers.
8. The apparatus of claim 2 , wherein the voltage regulator comprises an enable input coupled to an output of the first comparator.
9. The apparatus of claim 1 , wherein the switch comprises a first transistor.
10. The apparatus of claim 1 , wherein the brown-out protection circuit detects that the undervoltage condition has passed and opens the switch.
11. The apparatus of claim 10 , wherein the voltage regulator monotonically charges the first capacitor from the predetermined voltage level to the regulated output voltage Vo.
12. The apparatus of claim 1 , wherein the brown-out protection circuit further comprises a delay circuit coupled to the first undervoltage detection input.
13. The apparatus of claim 12 , wherein the delay circuit comprises a first resistor and a diode coupled in parallel with a second capacitor.
14. The apparatus of claim 13 , wherein, when the first undervoltage detection signal increases, the delay circuit charges the second capacitor over a predetermined time.
15. The apparatus of claim 14 , wherein the predetermined time is at least equal to the time for the first capacitor to discharge below the predetermined voltage level.
16. The apparatus of claim 1 , wherein the first capacitor is operably coupled to a Dynamic Random Access Memory (DRAM).
17. The apparatus of claim 16 , wherein the DRAM is a Double Data Rate Dynamic Random Access Memory (DDR DRAM).
18. The apparatus of claim 1 , further comprising a second resistor coupled between the first capacitor and the switch.
19. The apparatus of claim 1 , wherein the predetermined voltage level is approximately 300 mV and the regulated output voltage level Vo is approximately 1.8 V.
20. The apparatus of claim 1 , wherein the voltage regulator comprises a voltage regulator output node (V FB ) and the regulated output voltage (V O ) across the first capacitor is determined by a resistor divider coupled between the voltage regulator output node (V FB ).
21. The apparatus of claim 20 , wherein the resistor divider comprises a first resistor being coupled between V FB and the first capacitor and a second resistor being coupled between V FB and a low supply voltage such that V O =V FB (1+R 1 /R 2 ).
22. The apparatus of claim 1 , wherein the first undervoltage detection signal comprises a regulated voltage derived from the voltage reference source Vcc, wherein the regulated voltage level is lower than Vcc.
23. The apparatus of claim 1 , wherein the first undervoltage detection signal is a reset signal indicating that the voltage regulator should be reset.
24. The apparatus of claim 1 , further comprising a second voltage regulator to provide the first undervoltage detection signal.
25. The apparatus of claim 1 , further comprising a reset comparator having a first input coupled to the voltage reference source Vcc, a second input coupled to a reset reference voltage, and an output coupled to the brown-out protection circuit.
26. A data storage system comprising:
a non-volatile media;
a volatile memory device;
a voltage reference source Vcc;
a first capacitor coupled to the volatile memory device;
a voltage regulator coupled to the voltage reference source Vcc and the first capacitor to charge the first capacitor to a regulated output voltage (V O );
a switch operably coupled to the voltage regulator, the first capacitor, and to a low voltage sink; and
a brown-out protection circuit coupled to the switch, the brown-out protection circuit comprising a first undervoltage detection input, wherein when the brown-out protection circuit detects an undervoltage condition based on a first undervoltage detection signal received at the undervoltage detection input, the brown-out protection circuit closes the switch to discharge the first capacitor to below a predetermined voltage level,
wherein the first undervoltage detection signal is generated based on the regulated output voltage (Vo).
27. The storage system of claim 26 , further comprising control circuitry coupled to the non-volatile media and the volatile memory device for controlling access to the non-volatile media and the volatile memory device.
28. The storage system of claim 26 , wherein the non-volatile media comprises a disk and the storage system further comprises a head for reading data from the disk.
29. The storage system of claim 28 , further comprising an actuator for positioning the head relative to the disk.
30. The storage system of claim 29 , further comprising control circuitry coupled to the actuator for controlling the positioning of the head relative to the disk.
31. The storage system of claim 26 , wherein the non-volatile media comprises at least one media selected from the group consisting of a magnetic disk, an optical disk, a solid state media, and a non-volatile semiconductor memory.
32. The storage system of claim 26 , wherein the volatile memory device comprises a Dynamic Random Access Memory (DRAM).
33. The storage system of claim 26 , wherein the volatile memory device comprises a Double Data Rate Dynamic Random Access Memory (DDR DRAM).
34. A method for protecting against a brown-out condition, comprising:
charging a first capacitor to a regulated voltage with a voltage regulator, wherein the voltage regulator is coupled to a voltage reference source Vcc;
receiving a first undervoltage detection signal;
detecting an undervoltage condition based on the first undervoltage detection signal;
closing a switch coupled to the voltage regulator, the first capacitor, and a low voltage sink;
discharging the first capacitor to below a predetermined voltage level; and
delaying the first undervoltage detection signal for a predetermined time, wherein the predetermined time is at least equal to the time for the first capacitor to discharge to the predetermined voltage level.
35. The method of claim 34 , further comprising comparing the first undervoltage detection signal to a second undervoltage detection signal.
36. The method of claim 35 , wherein the second undervoltage detection signal is derived from the voltage reference source Vcc.
37. The method of claim 36 , further comprising generating the second undervoltage detection signal based on the voltage reference source Vcc and a diode.
38. The method of claim 35 , wherein the first undervoltage detection signal comprises a regulated voltage derived from the voltage reference source Vcc, wherein the regulated voltage level is lower than Vcc.
39. The method of claim 34 , wherein the switch comprises a first transistor.
40. The method of claim 34 , further comprising disabling the voltage regulator.
41. The method of claim 34 , further comprising monotonically charging the first capacitor from the predetermined voltage level to the regulated output voltage.
42. The method of claim 34 , wherein the first undervoltage detection signal is a reset signal.
43. An apparatus for regulating an output voltage, comprising:
a voltage reference source Vcc;
a first capacitor;
a voltage regulator coupled to the voltage reference source Vcc and the first capacitor to charge the first capacitor to a regulated output voltage (V O );
a switch operably coupled to the voltage regulator, the first capacitor, and to a low voltage sink; and
a brown-out protection circuit coupled to the switch, the brown-out protection circuit comprising:
a first undervoltage detection input to receive a first undervoltage detection signal;
second undervoltage detection input to receive a second undervoltage detection signal, wherein the second undervoltage detection signal is derived from the voltage reference source Vcc;
a diode coupled to the second undervoltage detection input;
a first comparator coupled to the first undervoltage detection input; and
a second comparator coupled with the switch, the second comparator comprising a first input coupled to the diode and a second input coupled to an output of the first comparator,
wherein when the brown-out protection circuit detects an undervoltage condition based on the first undervoltage detection signal received at the first undervoltage detection input, the brown-out protection circuit closes the switch to discharge the first capacitor to below a predetermined voltage level.
44. The apparatus of claim 43 , wherein the second comparator closes the switch based on the first and second undervoltage detection signals.
45. The apparatus of claim 43 , wherein the first and second comparators comprise first and second differential operational amplifiers.
46. An apparatus for regulating an output voltage, comprising:
a voltage reference source Vcc;
a first capacitor;
a voltage regulator coupled to the voltage reference source Vcc and the first capacitor to charge the first capacitor to a regulated output voltage (V O );
a switch operably coupled to the voltage regulator, the first capacitor, and to a low voltage sink; and
a brown-out protection circuit coupled to the switch, the brown-out protection circuit comprising:
a first undervoltage detection input; and
a delay circuit coupled to the first undervoltage detection input, the delay circuit comprising a first resistor and a diode coupled in parallel with a second capacitor,
wherein when the brown-out protection circuit detects an undervoltage condition based on a first undervoltage detection signal received at the first undervoltage detection input, the brown-out protection circuit closes the switch to discharge the first capacitor to below a predetermined voltage level, and
when the first undervoltage detection signal increases, the delay circuit charges the second capacitor over a predetermined time, wherein the predetermined time is at least equal to the time for the first capacitor to discharge below the predetermined voltage level.