Thin film array panel and manufacturing method thereof
View Patent ↗A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer, forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode.
1. A method of manufacturing a thin film array panel, the method comprising:
forming a gate line formed on a substrate;
forming a gate insulating layer on the gate line;
forming a semiconductor layer on the gate insulating layer;
forming an ohmic contact layer on the semiconductor layer;
forming a data line including a source electrode and a drain electrode disposed at least on the ohmic contact layer;
forming an oxide film on the data line and the drain electrode;
etching the ohmic contact layer using the source electrode and the drain electrode as an etch mask; and
forming a pixel electrode connected to the drain electrode,
wherein the oxide film has the same pattern as the data line and the drain electrode.
2. The method of claim 1 , wherein the formation of the oxide film comprises:
performing oxygen plasma treatment on the data line and the drain electrode.
3. The method of claim 2 , wherein the oxygen plasma treatment is performed for a time longer than about fifteen seconds.
4. The method of claim 1 , wherein the data line and the drain electrode comprise a first film of Mo or Mo alloy.
5. The method of claim 4 , wherein the data line and the drain electrode further comprise a second film of Al or Al alloy.
6. The method of claim 1 , further comprising:
performing ashing after the formation of the oxide film.
7. The method of claim 1 , wherein the formation of the oxide film comprises:
exposing the data line and the drain electrode to air.
8. The method of claim 1 , wherein the pixel electrode comprises ITO or IZO.
9. The method of claim 1 , wherein the ohmic contact layer comprises extrinsic amorphous silicon.
10. The method of claim 1 , wherein the semiconductor layer, the ohmic contact layer, and the drain electrode and the data line are formed by using a single photoresist pattern.
11. The method of claim 1 , wherein
coverage of the oxide film does not extend beyond the data line and the drain electrode.
12. The method of claim 1 , further comprising forming a passivation layer on the data line and the drain electrode,
wherein the oxide film is disposed between the passivation layer and all of the data line and the drain electrode.
13. The method of claim 1 , wherein the oxide film comprises molybdenum oxide.