Despreading methods and apparatus
View Patent ↗Despreading apparatus with a relatively simple control is described. Plurality of despreading modules are provided in parallel, e.g., one per user. Each despreading module supports a plurality of despreading rates, e.g., ranging from the minimum to the maximum despreading rate that may be assigned to a user. Each despreading module is controlled in a simple manner with the output of the despreading module and despreading rate achieved being determined by a control module controlling a controllable downsampling module such that despreading rate corresponding to the individual user to which the despreading module corresponds is achieved at any given time. MUX control signals are provided to a plurality of MUXes included in the despreading module, and may be stored in a table with each set of MUX control signals corresponding to a different despreading rate. Control is greatly simplified, compared to systems where a set of despreading circuitry is dynamically configured.
1. A despreading apparatus supporting a plurality of symbol rates, comprising:
a despreading by four assemblies configured to receive a chip stream and to generate a first reduced rate symbol stream therefrom, the first reduced rate symbol stream having a symbol rate which is one fourth the rate of said chip stream;
a first rate converter configured to receive the first reduced rate symbol stream and to generate a second reduced rate symbol stream therefrom, the second reduced rate symbol stream having a symbol rate one eighth that of the chip stream;
a plurality of five additional rate converters coupled together in sequence, a first of the five additional rate converters having an input for receiving the second reduced rate symbol stream, each individual rate converter in the five additional rate converters producing a reduced rate symbol stream having a data rate one half that of an input symbol stream to the individual rate converter; and
wherein said despreading by four assemblies, said first rate converter and said plurality of five additional rate converters, in combination generate a total of seven reduced rate symbol streams.
2. The despreading apparatus of claim 1 , wherein said first rate converter includes a summer, unit delay and downsampler for downsampling by two, the summer and unit delay element receiving symbols output by the despreading by four assemblies, said summer having a second input coupled to the output of the unit delay, the downsampler having an input coupled to the output of said summer and producing symbols at one eighth the rate of said chip stream.
3. The despreading module apparatus of claim 1 , further comprising:
a plurality of first through seventh multiplexers, a first of the first through seventh multiplexers having as its inputs a dummy value and the output of the fifth additional rate converter, each of the second through seventh multiplexers having as an input, the output of a preceding multiplexer and one of the sixth through first reduced rate symbol streams, respectively.
4. The despreading module apparatus of claim 3 , further comprising:
a controllable downsampler coupled to the output of the seventh multiplexer in said first through seventh multiplexers, said controllable downsampler being configured to downsample the symbol stream generated by the seventh multiplexer to a desired symbol rate.
5. The despreading module apparatus of claim 4 , further comprising:
a control module configured to determine the desired symbol rate from user data rate information.
6. A despreading apparatus supporting a plurality of symbol rates, comprising:
despreading by four means for receiving a chip stream and for generating a first reduced rate symbol stream therefrom, the first reduced rate symbol stream having a symbol rate which is one fourth the rate of said chip stream;
first rate converter means for receiving the first reduced rate symbol stream and for generating a second reduced rate symbol stream therefrom, the second reduced rate symbol stream having a symbol rate one eighth that of the chip stream;
a plurality of five additional rate converter means, said five additional rate converter means being coupled together in sequence, a first of the five additional rate converter means having an input for receiving the second reduced rate symbol stream, each individual rate converter means in the five additional rate converter means producing a reduced rate symbol stream having a data rate one half that of an input symbol stream to the individual rate converter means; and
wherein said despreading by four means, said first rate converter means and said plurality of five additional rate converter means, in combination generate a total of seven reduced rate symbol streams.
7. The despreading apparatus of claim 6 , wherein said first rate converter means include a summer, unit delay and downsampler for downsampling by two, the summer and unit delay element receiving symbols output by the despreading by four means, said summer having a second input coupled to the output of the unit delay, the downsampler having an input coupled to the output of said summer and producing symbols at one eighth the chip stream rate.
8. The despreading apparatus of claim 6 , further comprising:
a plurality of first through seventh alternating switching means for multiplexing inputs, the first of the alternating switching means having as its inputs a dummy value and the output of the fifth additional rate converter, each of the second through seventh alternating switching means having as an input, the output of a preceding alternating switching means and one of the sixth through first reduced rate symbol streams, respectively.
9. The despreading apparatus of claim 8 , further comprising:
a controllable downsampling means for downsampling the symbol stream generated by the seventh alternating switching means to a desired symbol rate, said controllable downsampling means being coupled to the output of the seventh alternating switching means.
10. The despreading apparatus of claim 9 , further comprising:
control means for determining the desired symbol rate from user data rate information.