System and method for providing linear buck boost transitions within a buck boost converter

1. A method of generating a regulated voltage, comprising the steps of:

generating a buck ramp signal;

adding the buck ramp signal to a constant value equal to the peak value of the buck ramp signal to generate a boost ramp signal;

determining whether a voltage compensation signal exceeds the peak value of the buck ramp signal;

generating a boost PWM drive signal responsive to the boost ramp signal and the voltage compensation signal when the voltage compensation signal exceeds the peak value of the buck ramp signal;

generating a buck PWM drive signal responsive to the buck ramp signal and the voltage compensation signal when the voltage compensation signal does not exceed the peak value of the buck ramp signal; and

operating a voltage regulator responsive to the boost PWM drive signal and the buck PWM drive signal.

2. The method of claim 1 , further including the steps of generating a compensation signal responsive to an output voltage and a reference voltage.

3. The method of claim 1 , wherein the step of generating the buck PWM drive signal responsive to the buck ramp signal further comprises the steps of:

driving the buck PWM drive signal to a logical high level when the voltage compensation signal exceeds the buck ramp signal; and

driving the buck PWM drive signal to a logical low level when the buck ramp signal exceeds the voltage compensation signal.

4. The method of claim 1 , wherein the step of generating the boost PWM drive signal responsive to the boost ramp signal further comprises the steps of:

driving the boost PWM drive signal to a logical high level when the voltage compensation signal exceeds the boost ramp signal; and

driving the boost PWM drive signal to a logical low level when the boost ramp signal exceeds the voltage compensation signal.

5. The method of claim 1 , wherein the step of operating further comprises the step of operating the voltage regulator to provide an output voltage having a linear response responsive to the buck PWM drive signal and the boost PWM drive signal.

6. A voltage regulator, comprising:

first circuitry for generating an output voltage responsive to an input voltage and a plurality of switching control signals;

switching control circuitry for generating the switching control signals responsive to the output voltage and at least one of a buck ramp signal and a boost ramp signal; and

voltage ramp generation circuitry for generating each of the buck ramp signal and the boost ramp signal, wherein the boost ramp signal is generated by adding the buck ramp signal with the peak value of the buck ramp signal to create a positive DC offset from the buck ramp signal.

7. The voltage regulator of claim 6 , wherein the first circuitry comprises:

a boost regulator portion responsive to the switching control signals; and

a buck regulator portion responsive to the switching control signals and connected with the boost regulator portion.

8. The voltage regulator of claim 6 , wherein the switching control circuitry further comprises:

compensation circuitry for generating a voltage compensation signal responsive to an output voltage and a reference voltage;

PWM circuitry for generating a buck PWM signal responsive to the voltage compensation signal and the buck ramp signal and for generating a boost PWM signal responsive to the voltage compensation signal and the boost ramp signal; and

driver circuitry for generating the switching control signals responsive to the buck PWM signal and the boost PWM signal.

9. The voltage regulator of claim 8 , wherein the switching control circuitry generates the buck PWM signals responsive to the compensation signal being less than the peak value of the buck ramp signal.

10. The voltage regulator of claim 8 , wherein the switching control circuitry generates the boost PWM signals responsive to the compensation signal being greater than the peak value of the buck ramp signal.

11. A switching control circuit for use with a voltage regulator, comprising:

circuitry for generating the switching control signals responsive to an output voltage and at least one of a buck ramp signal and a boost ramp signal; and

voltage ramp generation circuitry for generating each of the buck ramp signal and the boost ramp signal, wherein the boost ramp signal is generated by adding the buck ramp signal with the peak value of the buck ramp signal to create a positive DC offset from the buck ramp signal.

12. The voltage regulator of claim 11 , wherein the circuitry for generating the switching control signals further comprises:

compensation circuitry for generating a voltage compensation signal responsive to an output voltage and a reference voltage;

PWM circuitry for generating a buck PWM signal responsive to the voltage compensation signal and the buck ramp signal and for generating a boost PWM signal responsive to the voltage compensation signal and the boost ramp signal; and

driver circuitry for generating the switching control signals responsive to the buck PWM signal and the boost PWM signal.

13. The voltage regulator of claim 12 , wherein the switching control circuitry generates the buck PWM signals responsive to the compensation signal being less than the peak value of the buck ramp signal.

14. The voltage regulator of claim 11 , wherein the switching control circuitry generates the boost PWM signals responsive to the compensation signal being greater than the peak value of the buck ramp signal.

15. A switching control circuit for use with a voltage regulator in a current control mode, comprising:

circuitry for generating a buck PWM signal responsive to an error amplifier signal, a ramp signal and a buck current signal, wherein the circuitry for generating further comprises:

an adder for adding the ramp signal with the buck current signal;

a comparator for comparing the error amplifier signal with the output of the adder to generate the buck PWM signal; and

second circuitry for generating a boost PWM signal responsive to the error amplifier signal, the ramp signal, the buck current signal, the boost current signal and a programmable shift level for the ramp signal.

16. The switching control circuit of claim 15 , wherein the second circuitry for generating further comprises:

a second adder for adding the output of the adder with the boost current signal and the programmable shift level; and

a second comparator for comparing the error amplifier signal with the output of the second adder to generate the boost PWM signal.